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CDC582PAHG4 データシート(PDF) 9 Page - Texas Instruments |
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CDC582PAHG4 データシート(HTML) 9 Page - Texas Instruments |
9 / 10 page CDC582 3.3V PHASELOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS SCAS446B − JULY 1994 − REVISED FEBRUARY 1996 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION tphase error 10 tphase error 11 tphase error 12 tphase error 15 Outputs Operating at CLKIN Frequency Outputs Operating at 2X CLKIN Frequency CLKIN CLKIN tphase error 13 tphase error 14 NOTES: A. Output skew, tsk(o), is calculated as the greater of: − The difference between the fastest and slowest of tphase error n (n = 10, 11, ...15) B. Process skew, tsk(pr), is calculated as the greater of: − The difference between the maximum and minimum tphase error n (n = 10, 11, ...15) across multiple devices under identical operating conditions Figure 3. Waveforms for Calculation of tsk(o) |
同様の部品番号 - CDC582PAHG4 |
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同様の説明 - CDC582PAHG4 |
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