CDCLVP110VFRG4 datasheet(5/14 Pages) TI1

部品番号	CDCLVP110VFRG4

部品情報	Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

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CDCLVP110

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SCAS683D – JUNE 2002 – REVISED JANUARY 2011

AC ELECTRICAL CHARACTERISTICS

Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V or LVECL/LVPECL input VCC = 0 V, VEE = -2.375 V to -3.8 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential propagation delay CLK0,

Input condition: VCM = 1 V,

–40°C, 25°C, 85°C

230

350

tpd

ps

CLK0 to all Q0, Q0… Q9, Q9

VPP = 0.5 V

tsk(pp)

Part-to-part skew

See Note B and Figure 1

–40°C, 25°C, 85°C

70

ps

tsk(o)

Output-to-output skew

See Note A and Figure 1

–40°C, 25°C, 85°C

15

30

ps

t(JITTER)

Cycle-to-cycle RMS jitter

–40°C, 25°C, 85°C

< 1

ps

Functional up to 3.5 GHz, timing

–40°C, 25°C, 85°C

f(max)

Maximum frequency

specifications apply at 1 GHz,

3500

MHz

see Figure 3

tr/tf

Output rise and fall time (20%, 80%)

–40°C, 25°C, 85°C

100

200

ps

HSTL INPUT

Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential propagation delay CLK0,

Input condition: Vx = 0.68 V,

–40°C, 25°C,

tpd

290

370

ps

CLK0 to all Q0, Q0… Q9, Q9

Vdif = 0.4 V

85°C

–40°C, 25°C,

tsk(pp)

Part-to-part skew

See Note B and Figure 1

70

ps

85°C

–40°C, 25°C,

tsk(o)

Output to output skew

See Note A and Figure 1

10

30

ps

85°C

–40°C, 25°C,

t(JITTER)

Cycle-to-cycle RMS jitter

<1

ps

85°C

Functional up to 3.5 GHz, timing

–40°C, 25°C,

f(max)

Maximum frequency

specifications apply at 1 GHz, See

3500

MHz

85°C

Figure 4

–40°C, 25°C,

tr/tf

Output rise and fall time (20%, 80%)

100

200

ps

85°C

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同様の部品番号 - CDCLVP110VFRG4

メーカー	部品番号	データシート	部品情報
Texas Instruments	CDCLVP110VFR	136Kb / 11P	[Old version datasheet] LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

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同様の説明 - CDCLVP110VFRG4

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