CDCVF2310-EP datasheet(4/16 Pages) TI1

部品番号	CDCVF2310-EP

部品情報	2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER

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CDCVF2310-EP

SCAS934 – DECEMBER 2012

www.ti.com

THERMAL INFORMATION

CDCVF2310

THERMAL METRIC(1)

PW

UNITS

24 PINS

θJA

Junction-to-ambient thermal resistance(2)

91.7

θJCtop

Junction-to-case (top) thermal resistance(3)

31.2

θJB

Junction-to-board thermal resistance(4)

46.4

°C/W

ψJT

Junction-to-top characterization parameter(5)

1.5

ψJB

Junction-to-board characterization parameter(6)

45.8

θJCbot

Junction-to-case (bottom) thermal resistance(7)

N/A

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA , using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

RECOMMENDED OPERATING CONDITIONS

(1)

MIN

NOM

MAX

UNIT

2.3

2.5

Supply voltage, VDD

V

3.3

3.6

VDD = 3 V to 3.6 V

0.8

Low-level input voltage, VIL

V

VDD = 2.3 V to 2.7 V

0.7

VDD = 3 V to 3.6 V

2

High-level input voltage, VIH

V

VDD = 2.3 V to 2.7 V

1.7

Input voltage, VI

0

VDD

V

VDD = 3 V to 3.6 V

12

High-level output current, IOH

mA

VDD = 2.3 V to 2.7 V

6

VDD = 3 V to 3.6 V

12

Low-level output current, IOL

mA

VDD = 2.3 V to 2.7 V

6

Operating junction temperature, TJ

–55

125

°C

(1)

Unused inputs must be held high or low to prevent them from floating.

4

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Product Folder Links: CDCVF2310-EP

同様の部品番号 - CDCVF2310-EP

メーカー	部品番号	データシート	部品情報
Texas Instruments	CDCVF2310	135Kb / 11P	[Old version datasheet] 2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER
	CDCVF2310	736Kb / 16P	[Old version datasheet] 2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER
	CDCVF2310	884Kb / 23P	[Old version datasheet] High-Performance Clock Buffer
	CDCVF2310PW	736Kb / 16P	[Old version datasheet] 2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER
	CDCVF2310PW	884Kb / 23P	[Old version datasheet] High-Performance Clock Buffer

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