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LM124JAN-SP データシート(PDF) 4 Page - Texas Instruments |
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LM124JAN-SP データシート(HTML) 4 Page - Texas Instruments |
4 / 26 page OBSOLETE LM124JAN SNOSAC4F – MARCH 2004 – REVISED APRIL 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) Power Dissipation(2) CDIP 400mW CLGA 350mW Ceramic SOIC 350mW Supply Voltage, V+ 36VDC or ±18VDC Input Voltage Differential 30VDC Input Voltage −0.3VDC to +32VDC Input Current (VIN < −0.3VDC) (3) 10 to 0.1mA Output Short-Circuit to GND(4) V+ ≤ 15VDC and TA = 25°C (One Amplifier) Continuous Operating Temperature Range −55°C ≤ TA ≤ +125°C Maximum Junction Temperature(2) 175°C Storage Temperature Range −65°C ≤ TA ≤ +150°C Lead Temperature (Soldering, 10 seconds) 260°C Thermal Resistance θJA CDIP (Still Air) 120°C/W (500LF/Min Air flow) 51°C/W CLGA (Still Air) 140°C/W (500LF/Min Air flow) 116°C/W Ceramic SOIC (Still Air) 140°C/W (500LF/Min Air flow) 116°C/W θJC CDIP 35°C/W CLGA 60°C/W Ceramic SOIC 60°C/W Package Weight (Typical) CDIP 2200mg CLGA 460mg Ceramic SOIC 410mg ESD Tolerance(5) 250V (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. (2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. (3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3VDC (at 25°C). (4) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15VDC, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. (5) Human body model, 1.5 k Ω in series with 100 pF. 4 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124JAN |
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