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SM320F28335-EP データシート(PDF) 2 Page - Texas Instruments |
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SM320F28335-EP データシート(HTML) 2 Page - Texas Instruments |
2 / 167 page SM320F28335-EP www.ti.com SPRS581D – JUNE 2009 – REVISED MAY 2012 Contents 1 SM320F28335 DSC ............................................................................................................. 10 1.1 Features .................................................................................................................... 10 1.2 SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS ........................................ 11 2 Introduction ...................................................................................................................... 12 2.1 Pin Assignments ........................................................................................................... 13 2.2 Signal Descriptions ........................................................................................................ 22 3 Functional Overview .......................................................................................................... 31 3.1 Memory Maps .............................................................................................................. 32 3.2 Brief Descriptions .......................................................................................................... 36 3.2.1 C28x CPU ....................................................................................................... 36 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 36 3.2.3 Peripheral Bus .................................................................................................. 36 3.2.4 Real-Time JTAG and Analysis ................................................................................ 37 3.2.5 External Interface (XINTF) .................................................................................... 37 3.2.6 Flash ............................................................................................................. 37 3.2.7 M0, M1 SARAMs ............................................................................................... 37 3.2.8 L0, L1, L2, L3, L4, L5, L6, L7 SARAMs ..................................................................... 37 3.2.9 Boot ROM ....................................................................................................... 38 3.2.10 Security .......................................................................................................... 38 3.2.11 Peripheral Interrupt Expansion (PIE) Block ................................................................. 39 3.2.12 External Interrupts (XINT1-XINT7, XNMI) ................................................................... 40 3.2.13 Oscillator and PLL .............................................................................................. 40 3.2.14 Watchdog ........................................................................................................ 40 3.2.15 Peripheral Clocking ............................................................................................. 40 3.2.16 Low-Power Modes .............................................................................................. 40 3.2.17 Peripheral Frames 0, 1, 2, 3 (PFn) ........................................................................... 41 3.2.18 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 41 3.2.19 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 41 3.2.20 Control Peripherals ............................................................................................. 42 3.2.21 Serial Port Peripherals ......................................................................................... 42 3.3 Register Map ............................................................................................................... 43 3.4 Device Emulation Registers .............................................................................................. 44 3.5 Interrupts .................................................................................................................... 45 3.5.1 External Interrupts .............................................................................................. 48 3.6 System Control ............................................................................................................ 49 3.6.1 OSC and PLL Block ............................................................................................ 51 3.6.1.1 External Reference Oscillator Clock Option .................................................... 52 3.6.1.2 PLL-Based Clock Module ......................................................................... 52 3.6.1.3 Loss of Input Clock ................................................................................ 54 3.6.2 Watchdog Block ................................................................................................. 54 3.7 Low-Power Modes Block ................................................................................................. 55 4 Peripherals ....................................................................................................................... 56 4.1 DMA Overview ............................................................................................................. 56 4.2 32-Bit CPU-Timers 0/1/2 ................................................................................................. 58 4.3 Enhanced PWM Modules (ePWM1/2/3/4/5/6) ......................................................................... 60 4.4 High-Resolution PWM (HRPWM) ....................................................................................... 63 4.5 Enhanced CAP Modules (eCAP1/2/3/4/5/6) ........................................................................... 65 4.6 Enhanced QEP Modules (eQEP1/2) .................................................................................... 68 4.7 Analog-to-Digital Converter (ADC) Module ............................................................................ 70 4.7.1 ADC Connections if the ADC Is Not Used .................................................................. 73 4.7.2 ADC Registers .................................................................................................. 73 2 Contents Copyright © 2009–2012, Texas Instruments Incorporated |
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