データシートサーチシステム |
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LM3409-Q1 データシート(PDF) 3 Page - Texas Instruments |
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LM3409-Q1 データシート(HTML) 3 Page - Texas Instruments |
3 / 45 page UVLO 1 VCC 2 VIN 3 4 12 EN 11 IADJ 10 CSP 5 13 14 COFF CSN NC NC 6 GND 9 8 PGATE 7 NC NC UVLO 1 CSP 2 VIN 3 4 8 COFF 7 EN 6 CSN 5 9 10 GND PGATE DAP VCC IADJ 3 LM3409, LM3409-Q1, LM3409HV, LM3409HV-Q1 www.ti.com SNVS602L – MARCH 2009 – REVISED JUNE 2016 Product Folder Links: LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated 5 Device Comparison Table ORDERABLE NUMBER MAXIMUM INPUT VOLTAGE (V) AEC-Q100 GRADE 1 QUALIFIED LM3409 42 N LM3409-Q1 Y LM3409HV 75 N LM3409HV-Q1 Y 6 Pin Configuration and Functions DGQ Package 10-Pin HVSSOP Top View NFF Package 14-Pin PDIP Top View Pin Functions PIN DESCRIPTION NAME PDIP HVSSOP UVLO 1 1 Input undervoltage lockout. Connect to a resistor divider from VIN and GND. Turn-on threshold is 1.24 V and hysteresis for turnoff is provided by a 22 µA current source. IADJ 3 2 Analog LED current adjust. Apply a voltage from 0 to 1.24 V, connect a resistor to GND, or leave open to set the current sense threshold voltage. EN 4 3 Logic level enable and PWM dimming. Apply a voltage >1.74 V to enable device, a PWM signal to dim, or a voltage < 0.5 V for low-power shutdown. COFF 5 4 Off-time programming. Connect resistor from VO, capacitor to GND to set off-time. GND 6 5 Connect to system ground. PGATE 9 6 Gate drive. Connect to gate of external P-channel MOSFET. CSN 10 7 Negative current sense. Connect to negative side of sense resistor. CSP 11 8 Positive current sense. Connect to positive side of sense resistor (also to VIN). VCC 12 9 VIN– referenced linear regulator output. Connect at least a 1-µF ceramic capacitor to VIN. The regulator provides power for the P-channel MOSFET drive. VIN 14 10 Input voltage. Connect to the input voltage. Thermal pad — Connect to GND pin. Place 4 to 6 vias from thermal pad to GND plane. |
同様の部品番号 - LM3409-Q1 |
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同様の説明 - LM3409-Q1 |
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