データシートサーチシステム |
|
LM43603-Q1 データシート(PDF) 3 Page - Texas Instruments |
|
|
LM43603-Q1 データシート(HTML) 3 Page - Texas Instruments |
3 / 50 page SW VIN PGND CBOOT VCC BIAS SYNC RT PGOOD EN SS/TRK AGND FB SW PGND VIN PAD 1 16 2 3 4 5 6 8 7 9 15 14 13 12 11 10 LM43603-Q1 www.ti.com SNVSA82A – APRIL 2015 – REVISED MAY 2015 6 Pin Configuration and Functions PWP Package 16-Pin HTSSOP Top View Pin Functions PIN DESCRIPTION NAME NUMBER TYPE(1) Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power SW 1,2 P inductor. Boot-strap capacitor connection for high-side driver. Connect a high quality 470 nF capacitor from CBOOT 3 P CBOOT to SW. Internal bias supply output for bypassing. Connect bypass capacitor from this pin to AGND. Do not VCC 4 P connect external loading to this pin. Never short this pin to ground during operation. Optional internal LDO supply input. To improve efficiency, it is recommended to tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V, or tie to an external 3.3 V or 5 V rail if available. When used, place a bypass capacitor BIAS 5 P (1 to 10 µF) from this pin to ground. Tie to ground when not in use. Do not float. BIAS pin voltage should never exceed VIN. Clock input to synchronize switching action to an external clock. Use proper high-speed termination to SYNC 6 A prevent ringing. Connect to ground if not used. Do not float Connect a resistor RT from this pin to AGND to program switching frequency. Leave floating for 500 RT 7 A kHz default switching frequency. Open drain output for power-good flag. Use a 10 k Ω to 100 kΩ pull-up resistor to logic rail or other DC PGOOD 8 A voltage no higher than 12 V. Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT. Do not short this FB 9 A pin to ground during operation. AGND 10 G Analog ground pin. Ground reference for internal references and logic. Connect to system ground. Soft-start control pin. Leave floating for internal soft-start slew rate. Connect to a capacitor to extend SS/TRK 11 A soft start time. Connect to external voltage ramp for tracking. Enable input to the internal LDO and regulator. High = ON and low = OFF. Connect to VIN, or to VIN EN 12 A through resistor divider,or to an external voltage or logic source. Do not float. Supply input pins to internal LDO and high side power FET. Connect to power supply and bypass VIN 13,14 P capacitors CIN. Path from VIN pin to high frequency bypass CIN and PGND must be as short as possible. Power ground pins, connected internally to the low side power FET. Connect to system ground, PAD, PGND 15,16 G AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation path of the PAD - - die. Must be used for heat sinking to ground plane on PCB. (1) P = Power, G = Ground, A = Analog Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM43603-Q1 |
同様の部品番号 - LM43603-Q1 |
|
同様の説明 - LM43603-Q1 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |