データシートサーチシステム |
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SN74ALS40A データシート(PDF) 1 Page - Texas Instruments |
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SN74ALS40A データシート(HTML) 1 Page - Texas Instruments |
1 / 3 page SN54ALS40A, SN74ALS40A DUAL 4INPUT POSITIVENAND BUFFERS SDAS197 − D2661, APRIL 1984 − REVISED MAY 1986 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1986, Texas Instruments Incorporated 5BASIC 1 • Package Options include Plastic Small Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs • Dependable Texas Instruments Quality and Reliability description These devices contain two independent 4-input NAND buffer gates. They perform the Boolean functions Y = A •B•C•D or Y = A + B + C+ D in positive logic. The SN54ALS40A is characterized for operation over the full military temperature range of − 55 °C to 125 °C. The SN74ALS40A is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each gate) INPUTS OUTPUT A B C D Y H H H H L L XXX H X LX X H X XLX H X X X L H logic symbol† & 13 12 8 2Y 6 1Y 10 9 5 4 2 1 2D 2C 2B 2A 1D 1C 1B 1A † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for D, J, and N packages. 1Y 1D 1A 1B 1C 2C 2B 2A 2D 2Y logic diagram (positive logic) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B NC 1C 1D 1Y GND VCC 2D 2C NC 2B 2A 2Y SN54ALS40A ...J PACKAGE SN74ALS40A . . . D OR N PACKAGE (TOP VIEW) 3 2 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2C 2C NC NC 2B NC NC 1C NC 1D SN54ALS40A . . . FK PACKAGE (TOP VIEW) NC − No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
同様の部品番号 - SN74ALS40A |
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同様の説明 - SN74ALS40A |
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