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SN74AUP1G32 データシート(PDF) 11 Page - Texas Instruments

部品番号 SN74AUP1G32
部品情報  Low-Power Single 2-Input Positive-OR Gate
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ホームページ  http://www.ti.com
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SN74AUP1G32 データシート(HTML) 11 Page - Texas Instruments

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3.3-V Bus driver
VCC
1-V Micro Processor
0.1 µF
Driver
µC
1 V regulated
SN74AUP1G32
www.ti.com
SCES580I – JUNE 2004 – REVISED JUNE 2014
10 Application and Implementation
10.1 Application Information
The AUP family is TI's premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity. It
has a small amount of hysteresis built in allowing for slower or noisy input signals. The lowered drive produces
slower edges and prevents overshoot and undershoot on the outputs.
The AUP family of single gate logic makes excellent translators for the new lower voltage Micro- processors that
typically are powered from 0.8 V to 1.2 V. They can drop the voltage of peripheral drivers and accessories that
are still powered by 3.3 V to the new uC power levels.
10.2 Typical Application
Figure 5. Typical Application Schematic
10.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits.
10.2.2 Detailed Design Procedure
1. Recommended Input conditions
Rise time and fall time specifications. See (
Δt/ΔV) in Recommended Operating Conditions table.
Specified high and low levels. See (VIH and VIL) in Recommended Operating Conditions table.
Inputs are overvoltage tolerant allowing them to go as high as 3.6 V at any valid VCC
2. Recommend output conditions
Load currents should not exceed 20 mA on the output and 50 mA total for the part
Outputs should not be pulled above VCC
Copyright © 2004–2014, Texas Instruments Incorporated
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