A

2

B

4

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7

SN74AUP1T34-Q1

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SCES852A – DECEMBER 2013 – REVISED APRIL 2016

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8 Detailed Description

8.1 Overview

The SN74AUP1T34-Q1 is a unidirectional, single-bit, dual-supply, noninverting voltage-level translator. Pin A,

3.6 V.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Fully Configurable Dual-Rail Design

between any of the voltage nodes (1 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V).

8.3.2 Partial-Power-Down Mode Operation

powered down. This can occur in applications where subsections of a system are powered down (partial-power-

down) to reduce power consumption.

to a high-impedance state, preventing false logic levels from being presented to either bus.

8.3.4 Input Hysteresis

Input hysteresis allows the input to support slew rates as slow as 200 ns/V, improving switching noise immunity.

8.4 Device Functional Modes

Table 1 lists the functional modes of the SN74AUP1T34-Q1.

Table 1. Function Table

INPUT

OUTPUT

A PORT

B PORT

L

L

H

H