SN74AUP2G126YFPR datasheet(1/24 Pages) TI1

部品番号	SN74AUP2G126YFPR

部品情報	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

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DCU PACKAGE

(TOP VIEW)

3

6

1Y

2Y

8

1

VCC

1OE

5

GND

4

2A

2

7

2OE

1A

The exposed center pad, if used, must be connected

only as a secondary GND or left electrically open.

V

CC

1

2

3

4

5

6

7

8

2OE

1Y

2A

GND

2Y

1A

1OE

RSE PACKAGE

(TOP VIEW)

1

8

2

7

3

6

1OE

1A

2Y

GND 4

5

VCC

2OE

1Y

2A

DQE PACKAGE

(TOP VIEW)

1OE

1A

GND

2Y

V

CC

2OE

1Y

2A

YFP OR YZP PACKAGE

(TOP VIEW)

4 5

3 6

2 7

1 8

A1

A2

B1

B2

C1

C2

D1

D2

SN74AUP2G126

www.ti.com

SCES687D – JANUARY 2007 – REVISED DECEMBER 2009

LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

Check for Samples: SN74AUP2G126

1

FEATURES

•

Available in the Texas Instruments NanoStar™

•

Wide Operating VCC Range of 0.8 V to 3.6 V

Package

•

Optimized for 3.3-V Operation

•

Low Static-Power Consumption

•

3.6-V I/O Tolerant to Support Mixed-Mode

(ICC = 0.9 μA Max)

Signal Operation

•

Low Dynamic-Power Consumption

•

tpd = 9.9 ns Max at 3.3 V

(Cpd = 4 pF Typ at 3.3 V)

•

Suitable for Point-to-Point Applications

•

Low Input Capacitance (Ci = 1.5 pF Typ)

•

Latch-Up Performance Exceeds 100 mA Per

•

Low Noise – Overshoot and Undershoot

JESD 78, Class II

<10% of VCC

•

ESD Performance Tested Per JESD 22

•

Input-Disable Feature Allows Floating Input

–

2000-V Human-Body Model

Conditions

(A114-B, Class II)

•

Ioff Supports Partial-Power-Down Mode

–

1000-V Charged-Device Model (C101)

Operation

•

Input Hysteresis Allows Slow Input Transition

and Better Switching Noise Immunity at Input

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static and dynamic power consumption across the entire VCC range

of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see

Figure 1 and Figure 2).

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

同様の部品番号 - SN74AUP2G126YFPR

メーカー	部品番号	データシート	部品情報
Texas Instruments	SN74AUP2G126YFPR	514Kb / 16P	[Old version datasheet] LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

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同様の説明 - SN74AUP2G126YFPR

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