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TDC7201ZAXR データシート(PDF) 11 Page - Texas Instruments |
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TDC7201ZAXR データシート(HTML) 11 Page - Texas Instruments |
11 / 50 page VREG1 TRIGG1 START2 STOP2 CLOCK INTB1 DOUT2 CSB1 DIN SCLK ENABLE VDD2 TDC1 Core Digital Core SPI SLAVE Configuration Registers Clock Counter & Decode Measurement Sequencer GND1 Schmitt Triggered Comparators LDO & Reference Subsystem Coarse Counter Ring Osc TDC7201 TRIGG2 START1 VREG2 STOP1 INTB2 DOUT1 VDD1 GND2 CSB2 TDC2 Core Coarse Counter Ring Osc Clock Counter & Decode Copyright © 2016, Texas Instruments Incorporated 11 TDC7201 www.ti.com SNAS686 – MAY 2016 Product Folder Links: TDC7201 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The TDC7201 has two built-in TDCs with the capability to simultaneously and individually measure time delay on two pairs of START and STOP pins. Each TDC is a stopwatch that measures time between a single event (edge on START pin) and multiple subsequent events (edge on STOP pin). An event from a START pulse to a STOP pulse is also known as time-of-flight, or TOF for short. The TDC has an internal time base that is used to measure time with accuracy in the order of picoseconds. This accuracy makes the TDC7201 ideal for applications such as drones and range finders, which require high accuracy in the picoseconds range. NOTE In rest of the documentation, we use TDCx to refer each TDC of the TDC7201, where x = 1, 2. Also, the prefix TDCx is used in register names to identify the TDC the register belongs to. Further the associated START, STOP, TRIGG, CSB, DOUT, and INTB pins of TDCx are represented as STARTx, STOPx, TRIGGx, CSBx, DOUTx, and INTBx. 7.2 Functional Block Diagram NOTE Do not tie together VREG1 and VREG2. |
同様の部品番号 - TDC7201ZAXR |
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同様の説明 - TDC7201ZAXR |
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