データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

TL16C2552 データシート(PDF) 4 Page - Texas Instruments

部品番号 TL16C2552
部品情報  1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
Download  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI1 - Texas Instruments

TL16C2552 データシート(HTML) 4 Page - Texas Instruments

  TL16C2552_16 Datasheet HTML 1Page - Texas Instruments TL16C2552_16 Datasheet HTML 2Page - Texas Instruments TL16C2552_16 Datasheet HTML 3Page - Texas Instruments TL16C2552_16 Datasheet HTML 4Page - Texas Instruments TL16C2552_16 Datasheet HTML 5Page - Texas Instruments TL16C2552_16 Datasheet HTML 6Page - Texas Instruments TL16C2552_16 Datasheet HTML 7Page - Texas Instruments TL16C2552_16 Datasheet HTML 8Page - Texas Instruments TL16C2552_16 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 34 page
background image
www.ti.com
TL16C2552
SLWS163A – SEPTEMBER 2005 – REVISED JUNE 2006
DEVICE INFORMATION (continued)
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NAME
FN NO.
RHB NO.
D0-D4
2 - 6
27 - 31
Data bus (bidirectional). These pins are the eight bit, 3-state data bus for transferring
I/O
information to or from the controlling CPU. D0 is the least significant bit and the first data bit in
D5-D7
7 - 9
32, 1, 2
a transmit or receive serial data stream.
Data set ready (active low). These inputs are associated with individual UART channels A
DSRA,
and B. A logic low on these pins indicates the modem or data set is powered on and is ready
41, 29
I
DSRB
for data exchange with the UART. The state of these inputs is reflected in the modem status
register (MSR).
Data terminal ready (active low). These outputs are associated with individual UART channels
A and B. A logic low on these pins indicates that theTLl16C2552 is powered on and ready.
DTRA,
37, 27
O
These pins can be controlled through the modem control register. Writing a 1 to MCR bit 0
DTRB
sets the DTR output to low, enabling the modem. The output of these pins is high after writing
a 0 to MCR bit 0, or after a reset.
GND
12, 22
20
Signal and power ground.
Interrupt A and B (active high). These pins provide individual channel interrupts, INT A and B.
INT A and B are enabled when MCR bit 3 is set to a logic 1, interrupt sources are enabled in
INTA, INTB
34, 17
21, 9
O
the interrupt enable register (IER). Interrupt conditions include: receiver errors, available
receiver buffer data, available transmit buffer space or when a modem status flag is detected.
INTA-B are in the high-impedance state after reset.
Read input (active low strobe). A high to low transition on IOR will load the contents of an
IOR
24
14
I
internal register defined by address bits A0-A2 onto the TL16C2552 data bus (D0-D7) for
access by an external CPU.
Write input (active low strobe). A low to high transition on IOW will transfer the contents of the
IOW
20
11
I
data bus (D0-D7) from the external CPU to an internal register that is defined by address bits
A0-A2 and CSA and CSB
NC
18, 19
No internal connection
Multi-function output. This output pin can function as the OP, BAUDOUT, or RXRDY pin. One
of these output signal functions can be selected by the user programmable bits 1-2 of the
alternate function register (AFR). These signal functions are described as follows:
1.
OP - When OP (active low) is selected, the MF pin is a logic 0 when MCR bit 3 is set to
a logic 1 (see MCR bit 3). MCR bit 3 defaults to a logic 1 condition after a reset or
MFA, MFB
35, 19
O
power-up.
2.
BAUDOUT - When BAUDOUT function is selected, the 16× baud rate clock output is
available at this pin.
3.
RXRDY - RXRDY (active low) is intended for monitoring DMA data transfers.
If it is not used, leave it unconnected.
Reset. RESET will reset the internal registers and all the outputs. The UART transmitter
RESET
21
12
I
output and the receiver input will be disabled during reset time. See TL16C2552 external
reset conditions for initialization details. RESET is an active-high input.
Ring indicator (active low). These inputs are associated with individual UART channels A and
B. A logic low on these pins indicates the modem has received a ringing signal from the
RIA, RIB
43, 31
I
telephone line. A low to high transition on these input pins generates a modem status
interrupt, if enabled. The state of these inputs is reflected in the modem status register (MSR)
Request to send (active low). These outputs are associated with individual UART channels A
and B. A low on the RTS pin indicates the transmitter has data ready and waiting to send.
RTSA,
Writing a 1 in the modem control register (MCR bit 1) sets these pins to low, indicating data is
36, 23
22, 13
O
RTSB
available. After a reset, these pins are set to high. These pins only affects the transmit and
receive operation when auto RTS function is enabled through the enhanced feature register
(EFR) bit 6, for hardware flow control operation.
Receive data input. These inputs are associated with individual serial channel data to the
RXA, RXB
39, 25
24, 15
I
2552. During the local loopback mode, these RX input pins are disabled and TX data is
internally connected to the UART RX input internally.
Transmit data. These outputs are associated with individual serial transmit channel data from
TXA, TXB
38, 26
23, 16
O
the 2552. During the local loopback mode, the TX input pin is disabled and TX data is
internally connected to the UART RX input.
TXRDYA,
Transmit ready (active low). TXRDY A and B go low when there are at least a trigger level
1, 32
O
TXRDYB
numbers of spaces available. They go high when the TX buffer is full.
VCC
33, 44
26
I
Power supply inputs.
4
Submit Documentation Feedback


同様の部品番号 - TL16C2552_16

メーカー部品番号データシート部品情報
logo
Texas Instruments
TL16C2552FN TI-TL16C2552FN Datasheet
445Kb / 34P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
TL16C2552RHB TI-TL16C2552RHB Datasheet
445Kb / 34P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
More results

同様の説明 - TL16C2552_16

メーカー部品番号データシート部品情報
logo
Texas Instruments
TL16C2552 TI-TL16C2552 Datasheet
445Kb / 34P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
TL16C2550-Q1 TI1-TL16C2550-Q1 Datasheet
997Kb / 38P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
TL16C2550 TI-TL16C2550_10 Datasheet
1Mb / 47P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
TL16C2752 TI-TL16C2752 Datasheet
340Kb / 25P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 64-BYTE FIFOS
TL16C2752 TI1-TL16C2752_16 Datasheet
393Kb / 26P
[Old version datasheet]   1.8-V to 5-V DUAL UART WITH 64-BYTE FIFOS
TL16C2550 TI-TL16C2550 Datasheet
417Kb / 34P
[Old version datasheet]   2.5-V to 5-V DUAL UART WITH 16-BYTE FIFOS
logo
NXP Semiconductors
SC16C550B PHILIPS-SC16C550B Datasheet
229Kb / 47P
   5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Rev. 02-14 December 2004
SC16C550B NXP-SC16C550B Datasheet
239Kb / 48P
   5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Rev. 05-1 October 2008
SC16C2550B PHILIPS-SC16C2550B_07 Datasheet
211Kb / 43P
   5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 04-15 February 2007
SC16C2552B NXP-SC16C2552B Datasheet
188Kb / 38P
   5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 03-12 February 2009
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com