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TDA2SG データシート(PDF) 2 Page - Texas Instruments |
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TDA2SG データシート(HTML) 2 Page - Texas Instruments |
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2 / 426 page  2 TDA2SX, TDA2SG TDA2HG, TDA2HV, TDA2LF SPRS951A – DECEMBER 2015 – REVISED APRIL 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2HG TDA2HV TDA2LF Device Overview Copyright © 2015–2016, Texas Instruments Incorporated 1.2 Applications • Mono or Stereo Front Camera – Object Detection – Pedestrian Detection – Traffic Sign Recognition – Lane Detection and Departure Warning – Automatic Emergency Braking – Adaptive Cruise Control – Forward Collision Warning – High Beam Assist • LVDS or Ethernet Surround View – 3D surround view – Rear object detection – Parking assist – Pedestrian Detection – Lane tracking – Drive Recording • Sensor Fusion – Vision, Radar, Ultrasonic, Lidar sensors – Object data fusion – Raw data fusion 1.3 Description TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience. The TDA2x SoC enables sophisticated embedded vision technology in today’s automobile by enabling the industry’s broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture. The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, ARM Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB. The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing. Additionally, TI provides a complete set of development tools for the ARM, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution. The TDA2x ADAS processor is qualified according to the AEC-Q100 standard. Device Information PART NUMBER PACKAGE BODY SIZE TDA2x FCBGA (760) 23.0 mm × 23.0 mm 1.4 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. 1.5 Functional Block Diagram Figure 1-1 is functional block diagram of the superset. |
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