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TDA8260 データシート(PDF) 6 Page - NXP Semiconductors |
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TDA8260 データシート(HTML) 6 Page - NXP Semiconductors |
6 / 23 page 2004 Sep 03 6 Philips Semiconductors Product specification Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer TDA8260TW FUNCTIONAL DESCRIPTION The TDA8260TW contains the core of the RF analog part of a digital satellite receiver. The signal coming from the Low Noise Block (LNB) is coupled through a Low Noise Amplifier (LNA) to the RF inputs. The internal circuitry performs the Zero-IF quadrature frequency conversion and the two in-phase (IBBOUT) and quadrature (QBBOUT) output signals can be used directly to feed a Satellite Demodulator and Decoder circuit (SDD). The TDA8260TW has a gain-controlled amplifier in the converter circuit. The gain is controlled by the AGCIN input from the SDD. An external VCO tank circuit is connected between pins TKA and TKB. The main elements of the external tank circuit are an SMD coil and a varactor diode. The tuning voltage of 0 to 30 V covers the whole frequency range from 237.5 to 543.75 MHz. The internal loop controls a fully integrated VCO to cover the range 950 to 2175 MHz. The VCO provides both in-phase and quadrature signals to drive the two mixers. Except for the 4 MHz crystal and the loop filter, all circuit components necessary to control the varactor-tuned oscillator are integrated in the TDA8260TW. The tuning circuit includes a fast phase detector with a high comparison frequency in order to achieve the lowest possible level of phase noise in the local oscillator. The fDIV output of the15-bit programmable divider passes through the fast phase comparator where it is compared in both phase and frequency with the comparison frequency (fCOMP). The frequency fCOMP is derived from the signal present at the XT1/XT2 pins (fXTAL) divided-down by the reference divider. The buffered XTOUT signal can drive the crystal frequency input of the SDD, thereby saving a crystal in the application. The output of the phase comparator drives the charge pump and loop amplifier section. The loop amplifier includes a high voltage transistor to handle the 30 V tuning voltage at pin VT, this drives a variable capacitance diode in the external circuit of the voltage controlled oscillator. Pin CP is the output of the charge pump. The loop filter is connected between pins CP and VT and the post-filter section is connected between pin VT and the variable capacitance diode. For test and alignment purposes, it is possible to release the tuning voltage output and apply an external voltage to pin VT, also to select the charge pump function to sink current, source current or to be switched off. handbook, halfpage TDA8260TW MGU791 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 XTOUT SDA SCL AS CP VT BVS VCC(VCO) TKA TKB VCOGND CAP1 CAP2 IOUT BBGND2 IBBIN n.c. IBBOUT IIN XT1 XT2 VCC(PLL) PLLGND AGCIN BIASN RFGND1 VCC(RF) RFA RFB RFGND2 LP1 LP2 QOUT BBGND1 QBBIN VCC(BB) QBBOUT QIN Fig.2 Pin configuration. |
同様の部品番号 - TDA8260 |
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同様の説明 - TDA8260 |
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