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TPD12S520RMNR データシート(PDF) 11 Page - Texas Instruments

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部品番号 TPD12S520RMNR
部品情報  TPD12S520 Single-Chip HDMI Receiver Port Protection and Interface Device
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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TPD12S520RMNR データシート(HTML) 11 Page - Texas Instruments

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VIA to GND Plane
VIA to 5V Plane
VIA to 3.3V Plane
VIA to LV Plane
Pin to GND
Legend
TPD12S520
HDMI
Connector
1
TPD12S520
www.ti.com
SLVS640F – OCTOBER 2007 – REVISED FEBRUARY 2015
10 Layout
10.1 Layout Guidelines
The optimum placement is as close to the connector as possible.
EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,
resulting in early system failures.
The PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces
away from the protected traces which are between the TVS and the connector.
Route the protected traces as straight as possible.
Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded
corners with the largest radii possible.
Electric fields tend to build up on corners, increasing EMI coupling.
10.2 Layout Example
Figure 10. TPD12S520DBT Layout Example
Use external and internal ground planes and stitch them together with VIAs as close to the GND pins of
TPD12S520 as possible. This allows for a low impedance path to ground so that the device can properly
dissipate an ESD event.
Copyright © 2007–2015, Texas Instruments Incorporated
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