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GS88018AT-133 データシート(PDF) 9 Page - GSI Technology

部品番号 GS88018AT-133
部品情報  512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
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メーカー  GSI [GSI Technology]
ホームページ  http://www.gsitechnology.com
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GS88018AT-133 データシート(HTML) 9 Page - GSI Technology

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Rev: 1.02 9/2002
9/26
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS88018/32/36AT-250/225/200/166/150/133
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
WR
R
WR
X
X
X
CR
R
CW
CR
CR
Simplified State Diagram
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1) and Write (BA, BB, BC, BD, BW, and GW) control inputs, and
that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.


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