データシートサーチシステム |
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LM1246 データシート(PDF) 11 Page - National Semiconductor (TI) |
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LM1246 データシート(HTML) 11 Page - National Semiconductor (TI) |
11 / 51 page Pin Descriptions and Application Information (Continued) Pin No. Pin Name Schematic Description 3V REF External resistor, 10k 1%, sets the internal bias current level for optimum performance of the LM1247. This resistor should be placed as close to pin 3 and the pin 4 ground return as possible. 4 Analog Input Ground This is the ground for the input analog portions of the LM1247 internal circuitry. 5 6 7 Blue Video In Red Video In Green Video In These video inputs must be AC coupled with a .0047 µF cap. Internal DC restoration is done at these inputs. A series resistor of about 33 Ω and external ESD protection diodes should also be used for protection from ESD damage. 8 10 Digital Ground PLL V CC The ground pin should be connected to the rest of the circuit ground by a short but independent PCB trace to prevent contamination by extraneous signals. The V CC pin should be isolated from the rest of the V CC line by a ferrite bead and bypassed to pin 8 with an electrolytic capacitor and a high frequency ceramic. 9 PLL Filter Recommended topology and values are shown to the left. It is recommended that both filter branches be bypassed to the independent ground as close to pin 8 as possible. Great care should be taken to prevent external signals from coupling into this filter from video, I 2C, etc. 11 SDA The I 2C compatible data line. A pull-up resistor of about 2 k Ω should be connected between this pin and V CC. A resistor of at least 100 Ω should be connected in series with the data line for additional ESD protection. www.national.com 11 |
同様の部品番号 - LM1246 |
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同様の説明 - LM1246 |
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