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GS1671A データシート(PDF) 11 Page - Semtech Corporation |
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GS1671A データシート(HTML) 11 Page - Semtech Corporation |
11 / 136 page GS1671A HD/SD SDI Receiver Data Sheet 54389 - 1 September 2012 11 of 136 D5, E5, F5, G4, G5 CORE_GND Input Power GND connection for device core. Connect to digital GND. D6, E6, F6, G6 CORE_VDD Input Power POWER connection for device core. Connect to 1.2V DC digital. D7 SW_EN Input CONTROL SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Used to enable switch-line locking, as described in Section 4.9.1. D8 JTAG/HOST Input CONTROL SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Used to select JTAG test mode or host interface mode. When JTAG/HOST is HIGH, the host interface port is configured for JTAG test. When JTAG/HOST is LOW, normal operation of the host interface port resumes. E1 EQ_VDD Input Power POWER pin for SDI buffer. Connect to 3.3V DC analog. E2 EQ_GND Input Power GND pin for SDI buffer. Connect to analog GND. E7 SDOUT_TDO Output COMMUNICATION SIGNAL OUTPUT Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. GSPI serial data output/test data out. In JTAG mode (JTAG/HOST = HIGH), this pin is used to shift test results from the device. In host interface mode, this pin is used to read status and configuration data from the device. Note: GSPI is slightly different than the SPI. For more details on GSPI, please refer to 4.19 GSPI - HOST Interface. E8 SDIN_TDI Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. GSPI serial data in/test data in. In JTAG mode (JTAG/HOST = HIGH), this pin is used to shift test data into the device. In host interface mode, this pin is used to write address and configuration data words into the device. F1, G1AGCP, AGCNAutomatic Gain Control for the equalizer. Attach the AGC capacitor between these pins. Table 1-1: Pin Descriptions (Continued) Pin Number Name Timing Type Description |
同様の部品番号 - GS1671A |
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同様の説明 - GS1671A |
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