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SN74VMEH22501DGGR データシート(PDF) 11 Page - Texas Instruments |
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SN74VMEH22501DGGR データシート(HTML) 11 Page - Texas Instruments |
11 / 25 page SN74VMEH22501 8BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3STATE OUTPUTS SCES357E − JULY 2001 − REVISED MARCH 2004 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 skew characteristics for UBT for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX UNIT tsk(LH) 3A 3B 1.3 ns tsk(HL) 3A 3B 1.1 ns tsk(LH) CLKAB 3B 0.8 ns tsk(HL) CLKAB 3B 0.8 ns tsk(LH) 3B 3A 0.7 ns tsk(HL) 3B 3A 0.6 ns tsk(LH) CLKBA 3A 0.7 ns tsk(HL) CLKBA 3A 0.6 ns 3A 3B 1.9 tsk(t)† CLKAB 3B 2.1 ns tsk(t)† 3B 3A 1.2 ns CLKBA 3A 1 3A 3B 2.8 tsk(pp) CLKAB 3B 2.7 ns tsk(pp) 3B 3A 1.3 ns CLKBA 3A 1.2 † tsk(t) − Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)]. |
同様の部品番号 - SN74VMEH22501DGGR |
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同様の説明 - SN74VMEH22501DGGR |
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