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TMP101 データシート(PDF) 6 Page - Texas Instruments |
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TMP101 データシート(HTML) 6 Page - Texas Instruments |
6 / 10 page TMP100, 101 6 SBOS231C www.ti.com The user can obtain 9, 10, 11, or 12 bits of resolution by addressing the Configuration Register and setting the reso- lution bits accordingly. For 9, 10, or 11 bit resolution, the most significant bits in the Temperature Register are used with the unused LSBs set to zero. CONFIGURATION REGISTER The Configuration Register is an 8-bit read/write register used to store bits that control the operational modes of the temperature sensor. Read/write operations are performed MSB first. The format of the Configuration Register for the TMP100 and TMP101 is shown in Table VI, followed by a breakdown of the register bits. The power-up/reset value of the Configuration Register is all bits equal to 0. The OS/ ALERT bit will read as 1 after power-up/reset. FAULT QUEUE (F1/F0) A fault condition occurs when the measured temperature exceeds the limits set in the THIGH and TLOW Registers. The Fault Queue is provided to prevent a false alert due to environmental noise and requires consecutive fault mea- surements to trigger the alert function of the TMP101. Table VII defines the number of measured faults that may be programmed to trigger an alert condition. TEMPERATURE DIGITAL OUTPUT ( °C) (BINARY) HEX 128 0111 1111 1111 7FF 127.9375 0111 1111 1111 7FF 100 0110 0100 0000 640 80 0101 0000 0000 500 75 0100 1011 0000 4B0 50 0011 0010 0000 320 25 0001 1001 0000 190 0.25 0000 0000 0100 004 0.0 0000 0000 0000 000 –0.25 1111 1111 1100 FFC –25 1110 0111 0000 E70 –55 1100 1001 0000 C90 –128 1000 0000 0000 800 TABLE V. Temperature Data Format. F1 F0 CONSECUTIVE FAULTS 00 1 01 2 10 4 11 6 TABLE VII. Fault Settings of the TMP100 and TMP101. CONVERSION TIME R1 R0 RESOLUTION (typical) 0 0 9 Bits (0.5 °C) 40ms 0 1 10 Bits (0.25 °C) 80ms 1 0 11 Bits (0.125 °C) 160ms 1 1 12 Bits (0.0625 °C) 320ms TABLE VIII. Resolution of the TMP100 and TMP101. Byte D7 D6 D5 D4 D3 D2 D1 D0 1 OS/ALERT R1 R0 F1 F0 POL TM SD TABLE VI. Configuration Register Format. SHUTDOWN MODE (SD) The Shutdown Mode of the TMP100 and TMP101 allows the user to save maximum power by shutting down all device circuitry other than the serial interface, which reduces current consumption to less than 1 µA. For the TMP100 and TMP101, Shutdown Mode is enabled when the SD bit is 1. The device will shutdown once the current conversion is completed. For SD equal to 0, the device will maintain continuous conversion. THERMOSTAT MODE (TM) The Thermostat Mode bit of the TMP101 indicates to the device whether to operate in Comparator Mode (TM = 0) or Interrupt Mode (TM = 1). For more information on comparator and interrupt modes, see text “HIGH and LOW Limit Registers.” POLARITY (POL) The Polarity Bit of the TMP101 allows the user to adjust the polarity of the ALERT pin output. If POL = 0, the ALERT pin will be active LOW, as shown in Figure 4. For POL = 1 the ALERT Pin will be active HIGH, and the state of the ALERT Pin is inverted. CONVERTER RESOLUTION (R1/R0) The Converter Resolution Bits control the resolution of the internal Analog-to-Digital (A/D) converter. This allows the user to maximize efficiency by programming for higher reso- lution or faster conversion time. Table VIII identifies the Resolution Bits and relationship between resolution and con- version time. FIGURE 4. Output Transfer Function Diagrams. Measured Temperature T HIGH T LOW TMP101 ALERT PIN (Comparator Mode) POL = 0 TMP101 ALERT PIN (Interrupt Mode) POL = 0 TMP101 ALERT PIN (Comparator Mode) POL = 1 TMP101 ALERT PIN (Interrupt Mode) POL = 1 Read Read Time Read |
同様の部品番号 - TMP101 |
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同様の説明 - TMP101 |
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