WAKE

DONE

RSTn

DELAY/

M_RST

NOT VALID M_RST

VALID M_RST

ANY RESET

10

TPL5010-Q1

SNAS679 – SEPTEMBER 2016

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Programming (continued)

8.5.2 Manual Reset

If VDD is connected to the DELAY/M_RST pin, the TPL5010-Q1 recognizes this as a manual reset condition. In

this case the time interval is not set. If the manual reset is asserted during the POR or during the reading

procedure, the reading procedure is aborted and is re-started as soon as the manual reset switch is released. A

pulse on the DELAY/M_RST pin is recognized as a valid manual reset only if it lasts at least 20 ms (observation

time is 30 ms).

A valid manual reset resets all the counters inside the TPL5010-Q1. The counters restart only when the high

Figure 10. Manual Reset

8.5.2.1 DELAY/M_RST

A resistance in the range between 500 Ω and 170 kΩ needs to be connected in order to select a valid time

interval. At the POR and during the reading of the resistance the DELAY/M_RST is connected to an analog

signal chain though a mux. After the reading of the resistance the analog circuit is switched off and the

DELAY/RST is connected to a digital circuit.

The manual reset detection is supported with a de-bounce feature which makes the TPL5010-Q1 insensitive to

the glitches on the DELAY/M_RST pin. When a valid manual reset signal is asserted on the DELAY/M_RST pin,

of the RSTn signal maybe affected by an uncertainty of about ±5 ms.

A valid manual reset puts all the digital output signals at their default values:

•

WAKE = LOW

•

RSTn = asserted LOW

8.5.2.2 Circuitry

The manual reset may be implemented using a switch (momentary mechanical action). The TPL5010-Q1 offers 2

possible approaches according to the power consumption constraints of the application.