データシートサーチシステム |
|
TPL5010-Q1 データシート(PDF) 10 Page - Texas Instruments |
|
|
TPL5010-Q1 データシート(HTML) 10 Page - Texas Instruments |
10 / 22 page WAKE DONE RSTn DELAY/ M_RST ttM_RSTt ttDBt ttRSTn+ tIPt ttIPt ttM_RSTt NOT VALID M_RST VALID M_RST ANY RESET 10 TPL5010-Q1 SNAS679 – SEPTEMBER 2016 www.ti.com Product Folder Links: TPL5010-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Programming (continued) 8.5.2 Manual Reset If VDD is connected to the DELAY/M_RST pin, the TPL5010-Q1 recognizes this as a manual reset condition. In this case the time interval is not set. If the manual reset is asserted during the POR or during the reading procedure, the reading procedure is aborted and is re-started as soon as the manual reset switch is released. A pulse on the DELAY/M_RST pin is recognized as a valid manual reset only if it lasts at least 20 ms (observation time is 30 ms). A valid manual reset resets all the counters inside the TPL5010-Q1. The counters restart only when the high digital voltage at DELAY/M_RST is removed and the next tRSTn is elapsed. Figure 10. Manual Reset 8.5.2.1 DELAY/M_RST A resistance in the range between 500 Ω and 170 kΩ needs to be connected in order to select a valid time interval. At the POR and during the reading of the resistance the DELAY/M_RST is connected to an analog signal chain though a mux. After the reading of the resistance the analog circuit is switched off and the DELAY/RST is connected to a digital circuit. The manual reset detection is supported with a de-bounce feature which makes the TPL5010-Q1 insensitive to the glitches on the DELAY/M_RST pin. When a valid manual reset signal is asserted on the DELAY/M_RST pin, the RSTn signal is asserted LOW after a delay of tM_RST. It remains LOW after a valid manual reset is asserted + tDB + tRSTn. Due to the asynchronous nature of the manual reset signal and its arbitrary duration, the LOW status of the RSTn signal maybe affected by an uncertainty of about ±5 ms. A valid manual reset puts all the digital output signals at their default values: • WAKE = LOW • RSTn = asserted LOW 8.5.2.2 Circuitry The manual reset may be implemented using a switch (momentary mechanical action). The TPL5010-Q1 offers 2 possible approaches according to the power consumption constraints of the application. |
同様の部品番号 - TPL5010-Q1 |
|
同様の説明 - TPL5010-Q1 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |