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LM122 データシート(PDF) 10 Page - National Semiconductor (TI) |
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LM122 データシート(HTML) 10 Page - National Semiconductor (TI) |
10 / 14 page Typical Applications (Continued) In this application the logic terminal is normally held high by R3 When a trigger pulse is received Q1 is turned on driv- ing the logic terminal to ground The result of triggering the timer and reversing the logic at the same time is that the output does not change from its initial low condition The only time the output will change states is when the trigger input stays high longer than one time period set by Rt and Ct The output pulse width is equal to the input trigger width minus Rt Ct C2 insures no output pulse for short (kRC) trigger pulses by prematurely resetting the timing capacitor when the trigger pulse drops CL filters the narrow spikes which would occur at the output due to propagation delays during switching 5V Switching Regulator Figure 13 is an application where the LM122 does not use its timing function A switching regulator is made using the internal reference and comparator to drive a PNP transistor switch Features of this circuit include a 55V minimum input voltage at 1A output current low part count and good effi- ciency (l 75%) for input voltages to 10V Line and load regulation are less than 05% and output ripple at the switching frequency is only 30 mV Q1 is an inexpensive plastic device which does not need a heatsink for ambient temperature up to 50 C D1 should be a fast switching di- ode Output voltage can be adjusted between 1V and 30V by choosing proper values for R2 R3 R4 and R5 For out- puts less than 2V a divider with 250X Thevinin resistance must be connected between VREF and ground with its tap point tied to VADJ No 22 Wire Wound on Molybdenum Permalloy Core TLH7768 – 24 FIGURE 13 5V Switching Regulator with 1 Amp Output and 55V Minimum Input Application Hints Aborting a Timing Cycle The LM122 does not have an input specifically allocated to a stop-timing function If such a function is desired it may be accomplished several ways Ground VADJ Raise RC more positive than VADJ Wire ‘‘OR’’ the output Grounding VADJ will end the timing cycle just as if the timing capacitor had reached its normal discharge point A new timing cycle can be started by the trigger terminal as soon as the ground is released A switching transistor is best for driving VADJ to as near ground as possible Worst case sink current is about 300 mA A timing cycle may also be ended by a positive pulse to a resistor (R s Rt 100) in series with the timing capacitor The pulse amplitude must be at least equal to VADJ (20V) but should not exceed 50V When the timing capacitor dis- charges a negative spike of up to 20V will occur across the resistor so some caution must be used if the drive pulse is used for other circuitry TLH7768 – 25 FIGURE 14 Cycle Interrupt The output of the timer can be wire ORed with a discrete transistor or an open collector logic gate output This allows overriding of the timer output but does not cause the timer to be reset until its normal cycle time has elapsed Using the LM122 as a Comparator A built-in reference and zero volt common mode limit make the LM122 very useful as a comparator Threshold may be adjusted from zero to three volts by driving the VADJ termi- nal with a divider tied to VREF Stability of the reference voltage is typically g1% over a temperature range of b 55 Cto a125 C Offset voltage drift in the comparator is typically 25 mV C in the boosted mode and 50 mV C un- boosted A resistor can be inserted in series with the input to allow overdrives up to g50V as shown in Figure 15 There is actually no limit on input voltage as long as current is limited to g1 mA The resistor shown contributes a worst case of 5 mV to initial offset In the unboosted mode the error drops to 025 mV maximum The capability of operat- ing off a single 5V supply with internal reference should make this comparator very useful 10 |
同様の部品番号 - LM122 |
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同様の説明 - LM122 |
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