データシートサーチシステム |
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TSC2013QRSARQ1 データシート(PDF) 3 Page - Texas Instruments |
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TSC2013QRSARQ1 データシート(HTML) 3 Page - Texas Instruments |
3 / 70 page AUX X– Y– SNSGND AD0 RESET DGND I/OVDD 5 6 7 8 16 15 14 13 AD0 SDA SCL AD1 PINTDAV RESET DGND I/OVDD AUX AGND SNSVDD/VREF X+ Y+ X– Y– SNSGND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TSC2013-Q1 www.ti.com SLVSC89A – JUNE 2014 – REVISED JULY 2014 5 Pin Configurations and Functions 16-Pin VQFN With Thermal Pad 16-Pin TSSOP RSA Package PW Package Top View Top View Pin Functions PIN I/O ADC DESCRIPTION NAME RSA PW AD0 16 1 I D I2C bus TSC address input bit 0 AD1 3 4 I D I2C bus TSC address input bit 1 AGND 9 10 — — Analog, digital, and ESD ground(1) AUX 8 9 — A Auxiliary channel No internal connection. Connect this pin to analog ground for mechanical DGND 6 7 — — stability. I/OVDD 7 8 I — Digital interface voltage Interrupt output. Data available or the pen-detect interrupt (PENIRQ), PINTDAV 4 5 O D depending on setting. Pin polarity is active-low. RESET 5 6 I D External hardware reset input (active-low). SDA 1 2 I/O D Serial data I/O SCL 2 3 I D Serial clock SNSGND 15 16 — — Sensor driver return SNSVDD/VREF 10 11 I — Power supply for sensor drivers and other analog blocks X+ 11 12 — A X+ channel X– 13 14 — A X– channel Y+ 12 13 — A Y+ channel Y– 14 15 — A Y– channel (1) For optimized system IEC ESD performance, contact Texas Instruments for schematic and layout reviews and suggestions. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 |
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