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LM1279N データシート(PDF) 8 Page - National Semiconductor (TI) |
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LM1279N データシート(HTML) 8 Page - National Semiconductor (TI) |
8 / 14 page Functional Description (Continued) channel has its own independent control pin with the 0V to 4V control range. An input of 4V give no attenuation, and an input of 0V gives the full 12 dB attenuation. The output of the drive attenuator stage goes to the inverting input of A2. Since this is the second inversion stage, the out- put of A2 will be the non-inverted video signal. Note that the output of gm1 goes to the non-inverting input of A2. Also note that the output of A2 goes to the inverting input of gm1. This is the feedback for the clamp circuitry. The output stage of A2 is an exact duplicate of the video output through A3. If a 390 Ω load impedance is used at the video output, then the black level at the output stage will accurately track the output of A2. The other input to gm1 is the desired black level output of the LM1279. Since the LM1279 has a fixed black level out- put, the non-inverting inputs to gm1 in all three channels go to a fixed 1.35V internal reference. This sets the black level output to a nominal 1.35V. gm1 acts like a sample and hold amplifier. Once the sandcastle sync exceeds 3.6V gm1 is ac- tivated, driving the input of A2 to a level where the video out- put will be 1.35V. For proper DC restoration it is important that gm1 be activated only during the horizontal flyback time when the video is at the black level. gm1 also charges the clamp cap to the correct voltage to maintain a 1.35V black level at the video output. When gm1 is turned off the voltage stored on the clamp cap will maintain the correct black level during the active video, thus restoring the DC level for a 1.35V black level. The input of A3 receives the output from A2. The video chan- nel of A3 is a duplication of the output stage to A2. As men- tioned in the previous paragraph this is done so that the DC restoration can be done at the A2 stage. A3 also receives the OSD input and a sandcastle input for blanking. By doing DC restoration at the A2 stage, OSD or blanking can be acti- vated at the output stage during the time DC restoration is being done at A2. There is an interface circuit between the sandcastle input and the A3 output stages. This interface cir- cuit will activate the blanking if the sandcastle sync input is between 1.7V and 6.0V. The blanking mode will force the output down to a level of about 0.1V. This is a blacker-than- black level and can be used for blanking at the cathodes of the CRT. Once the sandcastle exceeds 6.5V, then the output will no longer be in the blanked mode, but DC restoration is still be- ing done on the video signal. The OSD signal goes into a special interface circuit. The out- put of this circuit will drive the output of A3 to either an OSD black level or to about 2.4V above the video black level (OSD white level). The OSD black level is about 300 mV be- low the video black level. This guarantees that if the OSD signal is not activated for a particular channel, then its output will be slightly below the cutoff level. If an OSD input is re- ceived in a particular channel, then the video output will be at the OSD white level. The OSD mode is automatically acti- vated if there is only one OSD signal to any of the video channels. This OSD control circuit will allow any color, ex- cept black, during the OSD mode. This also saves the need for a special signal to switch into the OSD mode. Remember that at least one OSD input must be high to enable the OSD mode, therefore black can’t be used in the OSD window. Sandcastle Sync This special sync signal is used to allow for a 20-pin OSD video pre-amp with all the desired controls. By using a sand- castle sync, both clamping and blanking can be activated from the same pin. Figure 4 shows the sandcastle sync sig- nal. There are four possible modes of operation with the Sandcastle pulse. These modes are: 1. Inactive Region 2. Blanking and no Clamping 3. Blanking and Clamping 4. Clamping and no Blanking Figure 4 also shows the voltage levels where the LM1279 switches from one mode to the other mode. As an example the LM1279 will switch from the inactive mode to the blank- ing and no clamping mode between 1.2V and 1.7V. For proper operation the inactive input must be safely below the 1.2V level. The blanking with no clamping pulse must be safely above 1.7V and below 2.8V. Blanking and clamping must be between 3.6V and 5.8V. Clamping and no blanking must be above 6.5V with the maximum voltage being limited by V CC. If the monitor designer desires to blank at the cathode, then he would go into the blanking and no clamping mode for most of the flyback period. During this period it is also neces- sary to do DC restoration. During this time the LM1279 should be operated in the blanking and clamping mode. In this mode DC restoration is done without interfering with blanking. In some designs the horizontal phase shift capability of the monitor is very large. In these designs the video can be moved so the flyback period can be displayed during the ac- tive trace period for the video. Now the clamping could be done during the normal video sweep time. During this period clamping with blanking will give a black bar on the CRT screen. This is not a normal operating mode of the monitor, but the monitor designer still may prefer not to display this black bar. Under this condition the clamp pulse must be above 6.5V. A simple two transistor sandcastle generator is covered in separate application note. This circuit will generate all four states for the sandcastle sync, including the clamp with no blanking when the clamping function occurs during the pe- riod for active video. The switching time between the inactive region and the clamp only region must be less than 30 ns if complete elimination of any blanking pulse is required in an application. Applications of the LM1279 Two demonstration boards are available to evaluate the LM1279. One board is the pre-amp demonstration board. This board was used for testing and characterizing the LM1279. The schematic for this board is shown in Figure 5 and the printed circuit layout for this board is shown in Figure 7. The other board is a complete video channel neck board that can be directly plugged into the CRT socket. The sche- matic for this board is shown in Figure 10 and the printed cir- cuit layout is shown in Figure 11. The CRT driver used on this board is the LM2407. Any of National’s monolithic CRT drivers can be used in this board, but the LM2407 is consid- ered the best match to the LM1279 based on cost and per- formance. Some important notes on Figure 5. All three video inputs have a 75 Ω terminating resistor for a 75Ω video system. This is the normal video impedance of the video from a computer system. It is possible to also have a 50 Ω system, then R1, R3, and R5 would be changed to 50 Ω. R2, R4, and R6 are in series with the video inputs of the LM1279. These three 30 Ω resistors are required to protect the IC from any sudden volt- www.national.com 8 |
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