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LM1292N データシート(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部品番号 LM1292N
部品情報  Video PLL System for Continuous-Sync Monitors
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM1292N データシート(HTML) 1 Page - National Semiconductor (TI)

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LM1292
Video PLL System for Continuous-Sync Monitors
General Description
The LM1292 is a very low jitter, integrated horizontal time
base solution specifically designed to operate in high perfor-
mance, continuous-sync video monitors. It automatically
synchronizes to any H frequency from 22 kHz to 125 kHz
and provides the drive pulse to the high power deflection cir-
cuit.
Available sync processing includes a vertical sync separator
and a composite video sync stripper. An internal sync selec-
tion scheme gives highest priority to separate H and V sync,
then composite sync, and finally sync on video; no external
switching between sync sources is necessary. The LM1292
provides polarity-normalized H/HV and V sync outputs.
The
LM1292
design
uses
an
on-chip
FVC
(Frequency-to-Voltage Converter) to set the center fre-
quency of the VCO (Voltage-Controlled Oscillator). This
technique allows autosync operation over the entire fre-
quency range using just one optimized set of external com-
ponents.
The system includes a second phase detector which com-
pensates for storage time variation in the horizontal output
transistor; the picture’s horizontal position is thus indepen-
dent of temperature and component variance.
The LM1292 provides DC control pins for H Drive duty cycle
and flyback phase.
Features
n Wide continuous autosync range — 22 kHz–125 kHz
(1:5.7) with no component switching or external
adjustments
n No manufacturing trims required — internal VCO
capacitor trimmed on chip
n No costly high-precision components needed
n Very low phase jitter (below 800 ps at 125 kHz)
n DC controlled H phase and duty cycle
n Video mute pulse for blanking during H frequency
transitions
n Input sync prioritization
n Clamp pulse position and width control
n Continuous clamp pulse output, even with no sync input
n Resistor-programmable minimum and maximum VCO
frequency
n X-ray input disables H drive and mutes video until VCC
powered down
n H drive disabled for VCC < 9.5V
n Horizontal output transistor protected against accidental
turn-on during flyback
n Capacitor-programmable frequency ramping, df vco/dt,
protects H output transistor during scanning mode
changes
Connection Diagram
DS012844-1
FIGURE 1. Order Number LM1292N
See NS Package Number N28B
April 1999
© 1999 National Semiconductor Corporation
DS012844
www.national.com


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