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MC10EL15DG データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC10EL15DG
部品情報  5V ECL 1:4 Clock Distribution Chip
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
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MC10EL15DG データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 7
Publication Order Number:
MC10EL15/D
1
MC10EL15, MC100EL15
5V ECL 1:4 Clock
Distribution Chip
The MC10EL/100EL15 is a low skew 1:4 clock distribution chip
designed explicitly for low skew clock distribution applications. The
VBB pin, an internally generated voltage supply, is available to this device
only. For single-ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also rebias
AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF
capacitor and limit current sourcing or sinking to 0.5 mA. When not used,
VBB should be left open.
The EL15 features a multiplexed clock input to allow for the
distribution of a lower speed scan or test clock along with the high
speed system clock. When LOW (or left open and pulled LOW by the
input pulldown resistor) the SEL pin will select the differential clock
input.
The common enable (EN) is synchronous so that the outputs will
only be enabled/disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock,
therefore all associated specification limits are referenced to the
negative edge of the clock input.
The 100 series contains temperature compensation.
Features
50 ps Output-to-Output Skew
Synchronous Enable/Disable
Multiplexed Clock Input
PECL Mode Operating Range:
VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −4.2 V to −5.7 V
Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and EN.
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
SOIC−16
D SUFFIX
CASE 751B−05
1
16
MARKING DIAGRAMS*
10EL15G
AWLYWW
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb-Free Package
100EL15G
AWLYWW
www.onsemi.com
ORDERING INFORMATION
Device
Package
Shipping
MC10EL15DG
SOIC−16
(Pb-Free)
48 Units/Tube
MC10EL15DR2G
SOIC−16
(Pb-Free)
2500/Tape & Reel
SOIC−16
(Pb-Free)
MC100EL15DR2G
2500/Tape & Reel
SOIC−16
(Pb-Free)
MC100EL15DG
48 Units/Tube
*For additional marking information, refer to
Application Note AND8002/D.
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.


同様の部品番号 - MC10EL15DG

メーカー部品番号データシート部品情報
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ON Semiconductor
MC10EL15DG ONSEMI-MC10EL15DG Datasheet
147Kb / 8P
   5V ECL 1:4 Clock Distribution Chip
August, 2005 ??Rev. 5
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