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MC100EL32DR2G データシート(PDF) 5 Page - ON Semiconductor

部品番号 MC100EL32DR2G
部品情報  Divider
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メーカー  ONSEMI [ON Semiconductor]
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MC100EL32DR2G データシート(HTML) 5 Page - ON Semiconductor

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MC10EL32, MC100EL32
www.onsemi.com
5
Table 7. AC CHARACTERISTICS (VCC = 5.0 V; VEE = 0 V or VCC = 0 V; VEE = −5.0 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Toggle Frequency
2.2
3.0
2.6
3.0
2.6
3.0
GHz
tPLH
tPHL
Propagation Delay
CLK to Q
Reset to Q
360
390
500
540
640
690
420
440
510
540
600
640
450
450
540
550
630
650
ps
VPP
Input Swing (Note 2)
150
1000
150
1000
150
1000
mV
tJITTER
Cycle-to-Cycle Jitter
TBD
TBD
TBD
ps
tr
tf
Output Rise/Fall Times Q
(20% − 80%)
100
225
350
100
225
350
100
225
350
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: VEE can vary +0.25 V / −0.5 V.
100 Series: VEE can vary +0.8 V / −0.5 V.
2. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.
Figure 2. Timing Diagram
CLK
RESET
Q
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V


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