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データシートサーチシステム |
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データシートサーチシステム |
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SM320VC5507PGESEP データシート(PDF) 11 Page - Texas Instruments |
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SM320VC5507PGESEP データシート(HTML) 11 Page - Texas Instruments |
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11 / 109 page  72 37 73 36 108 109 144 1 SM320VC5507-EP www.ti.com SPRS613 – SEPTEMBER 2009 memory on the 5507. The HPI can be configured in either multiplexed or non-multiplexed mode to provide glueless interface to a wide variety of host processors. The DMA controller provides data movement for six independent channel contexts without CPU intervention, providing DMA throughput of up to two 16-bit words per cycle. Two general-purpose timers, up to eight dedicated general-purpose I/O (GPIO) pins, and digital phase-locked loop (DPLL) clock generation are also included. The 5507 is supported by the industry’s award-winning eXpressDSP™, Code Composer Studio™ Integrated Development Environment (IDE), DSP/BIOS™, Texas Instruments’ algorithm standard, and the industry’s largest third-party network. The Code Composer Studio IDE features code generation tools including a C Compiler and Visual Linker, simulator, RTDX™, XDS510™ emulation device drivers, and evaluation modules. The 5507 is also supported by the C55x DSP Library which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip and board support libraries. 2.2 Pin Assignments The SM320VC5507PGE 144-pin low-profile quad flatpack (LQFP) pin assignments are shown in Figure 2-1 and is used in conjunction with Table 2-1 to locate signal names and pin numbers. DVDD is the power supply for the I/O pins while CVDD is the power supply for the core. VSS is the ground for both the I/O pins and the core. RCVDD and RDVDD are RTC module core and I/O supply, respectively. USBVDD is the USB module I/O (DP, DN, and PU) supply. ADVDD is the power supply for the digital portion of the ADC. AVDD is the power supply for the analog part of the ADC. ADVSS is the ground pin for the digital portion of the ADC. AVSS is the ground pin for the analog part of the ADC. USBPLLVDD and USBPLLVSS are the dedicated supply and ground pins for the USB PLL, respectively. Figure 2-1. 144-Pin PGE Low-Profile Quad Flatpack (Top View) Copyright © 2009, Texas Instruments Incorporated Introduction 11 Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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