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MC100LVEL05DTR2G データシート(PDF) 2 Page - ON Semiconductor

部品番号 MC100LVEL05DTR2G
部品情報  3.3V ECL 2?륤nput Differential AND/NAND
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100LVEL05DTR2G データシート(HTML) 2 Page - ON Semiconductor

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MC100LVEL05
www.onsemi.com
2
1
2
3
45
6
7
8
D0
D0
D1
D1
VEE
Q
Q
VCC
Figure 1. Logic Diagram and Pinout Assignment
D0, D0; D1, D1
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
Table 1. PIN DESCRIPTION
PIN
FUNCTION
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Psower Supply
VEE = 0 V
8 to 0
V
VEE
NECL Mode Power Supply
VCC = 0 V
−8 to 0
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI ≤ VCC
VI ≥ VEE
6 to 0
−6 to 0
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−8
190
130
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−8
41 to 44 ± 5%
°C/W
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP−8
185
140
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
TSSOP−8
41 to 44 ± 5%
°C/W
Tsol
Wave Solder (Pb-Free)
< 2 to 3 sec @ 260°C
265
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.


同様の部品番号 - MC100LVEL05DTR2G

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ON Semiconductor
MC100LVEL05DTR2G ONSEMI-MC100LVEL05DTR2G Datasheet
140Kb / 8P
   3.3V ECL 2-Input Differential AND/NAND
December, 2006 ??Rev. 3
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