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NBSG86AMNHTBG データシート(PDF) 1 Page - ON Semiconductor

部品番号 NBSG86AMNHTBG
部品情報  2.5V/3.3V SiGe Differential Smart Gate with Output Level Select
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 19
1
Publication Order Number:
NBSG86A/D
NBSG86A
2.5V/3.3V SiGe Differential
Smart Gate with Output
Level Select
The NBSG86A is a multi−function differential Logic Gate which
can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1
MUX. This device is part of the GigaComm
™ family of high
performance Silicon Germanium products. The device is housed in a
3 x 3 mm 16 pin QFN package.
Differential inputs incorporate internal 50
W termination resistors
and accept NECL (Negative ECL), PECL (Positive ECL),
LVCMOS/LVTTL, CML, or LVDS. The Output Level Select (OLS)
input is used to program the peak−to−peak output amplitude between
0 and 800 mV in five discrete steps.
The NBSG86A employs input default circuitry so that under open
input conditions (Dx, Dx, VTDx, VTDx, VTSEL) the outputs of the
device will remain stable.
Features
Maximum Input Clock Frequency > 8 GHz Typical
Maximum Input Data Rate > 8 Gb/s Typical
165 ps Typical Propagation Delay
40 ps Typical Rise and Fall Times
Selectable Swing PECL Output with Operating Range:
VCC = 2.375 V to 3.465 V with VEE = 0 V
Selectable Swing NECL Output with NECL Inputs with
Operating Range: VCC = 0 V with VEE = −2.375 V to −3.465 V
Selectable Output Level (0 V, 200 mV, 400 mV,
600 mV, or 800 mV Peak−to−Peak Output)
50 W Internal Input Termination Resistors
This is a Pb−Free Device
MARKING
DIAGRAM*
http://onsemi.com
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
QFN16
MN SUFFIX
CASE 485G
1
See detailed ordering and shipping information on page 16 of
this data sheet.
ORDERING INFORMATION
16
SG
86A
ALYW
G
G
1


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