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LM2618BTL データシート(PDF) 3 Page - National Semiconductor (TI) |
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LM2618BTL データシート(HTML) 3 Page - National Semiconductor (TI) |
3 / 15 page Pin Description Pin Number (*) Pin Name Function A1 FB Feedback Analog Input. Connect to the output at the output filter capacitor (Figure 1) B1 VID1 Output Voltage Control Inputs. Set the output voltage using these digital inputs (see Table 1). The output defaults to 1.87V if these pins are unconnected. C1 VID0 D1 SYNC/MODE Synchronization Input. Use this digital input for frequency selection or modulation control. Set: SYNC/MODE = high for low-noise 600kHz PWM mode SYNC/MODE = low for low-current PFM mode SYNC/MODE = a 500kHz - 1MHz external clock for synchronization to an external clock in PWM mode. See Synchronization and Operating Modes in the Device Information section. D2 EN Enable Input. For shutdown, set low to SGND. (See Shut down Mode in the Device Information section.) D3 PGND Power Ground C3 SW Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the max Switch Peak Current Limit specification of the LM2618 (Figure 1) B3 PVIN Power Supply Input to the internal PFET switch. Connect to the input filter capacitor (Figure 1). A3 VDD Analog Supply Input. If board layout is not optimum, an optional 0.1µF ceramic capacitor is suggested (Figure 1) A2 SGND Analog and Control Ground (*) Note that the pin numbering scheme for the microSMD package was revised in April,2002 to conform to JEDEC standard. Only the pin numbers were revised. No changes to the physical location of the inputs/outputs were made. For reference purpose, the obsolete numbering had FB as pin 1, VID1 as pin 2, VID0 as pin 3, SYNC as pin 4, EN as pin 5, PGND as pin 6, SW as pin 7, PVIN as pin 8, VDD as pin 9 and SGND as pin 10. www.national.com 3 |
同様の部品番号 - LM2618BTL |
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同様の説明 - LM2618BTL |
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