データシートサーチシステム |
|
LD39100PU25R データシート(PDF) 7 Page - STMicroelectronics |
|
LD39100PU25R データシート(HTML) 7 Page - STMicroelectronics |
7 / 27 page LD39100 Electrical characteristics DocID15676 Rev 6 7/27 Symbol Parameter Test conditions Min. Typ. Max. Unit IQ Quiescent current IOUT = 0 mA 20 µA IOUT = 0 mA -40 °C < TJ < 125 °C 50 IOUT = 0 to 1 A 200 IOUT = 0 to 1 A -40 °C < TJ < 125 °C 300 VIN input current in off mode: VEN = GND (3) 0.001 1 PG Power good output threshold Rising edge 0.92* VOUT V Falling edge 0.8* VOUT Power good output voltage low Isink = 6 mA open drain output 0.4 V ISC Short-circuit current RL= 0 1.5 A VEN Enable input logic low VIN = 1.5 V to 5.5 V -40 °C < TJ< 125 °C 0.4 V Enable input logic high 0.9 V IEN Enable pin input current VEN = VIN 0.1 100 nA tON Turn-on time (4) 30 µs TSHDN Thermal shutdown 160 °C Hysteresis 20 COUT Output capacitor Capacitance (see Section 5: "Typical performance characteristics") 1 µF Notes: (1)All transient values are guaranteed by design, not tested in production. (2)Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply to output voltages below 1.5 V. (3)PG pin floating. (4)Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95% of its nominal value. |
同様の部品番号 - LD39100PU25R |
|
同様の説明 - LD39100PU25R |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |