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LMR23625-Q1 データシート(PDF) 7 Page - Texas Instruments |
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LMR23625-Q1 データシート(HTML) 7 Page - Texas Instruments |
7 / 34 page 7 LMR23625-Q1 www.ti.com SNVSAR5 – DECEMBER 2016 Product Folder Links: LMR23625-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Guaranteed by design. 7.6 Timing Characteristics Over the recommended operating junction temperature range of -40 °C to 125 °C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT HICCUP MODE NOC (1) Number of cycles that LS current limit is tripped to enter Hiccup mode 64 Cycles TOC Hiccup retry delay time SOIC package 5 ms WSON package 12 SOFT START TSS Internal soft-start time. The time of internal reference to increase from 0 V to 1.0 V SOIC package 1 2 3 ms WSON package 6 POWER GOOD TPGOOD_RISE Power-good flag rising transition deglitch delay 150 μs TPGOOD_FALL Power-good flag falling transition deglitch delay 18 μs |
同様の部品番号 - LMR23625-Q1 |
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同様の説明 - LMR23625-Q1 |
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