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BD34602FS-E2 データシート(PDF) 7 Page - Rohm

部品番号 BD34602FS-E2
部品情報  6ch Sound Processor for High-Quality Audio with Built-in Advanced Switch
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メーカー  ROHM [Rohm]
ホームページ  http://www.rohm.com
Logo ROHM - Rohm

BD34602FS-E2 データシート(HTML) 7 Page - Rohm

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Datasheet
Datasheet
BD34602FS-M
TSZ02201-0C2C0E100310-1-2
© 2015 ROHM Co., Ltd. All rights reserved.
22.Oct.2015
Rev.001
www.rohm.com
TSZ22111・15・001
tBUF
:4us
tHD;STA
:2us
tHD;DAT
:1us
tLOW
:3us
tHIGH
:1us
tSU;DAT
:1us
tSU;STO
:2us
SCL clock frequency:250kHz
SCL
SDA
CONTROL SIGNAL SPECIFICATION
(1) Electrical specifications and timing for bus lines and I/O stages
Figure 12. Definition of timing on the I
2C-BUS
Table 1 Characteristics of the SDA and SCL bus lines for I
2C-BUS devices
Item
Symbol
Fast-mode I
2C-BUS)
Unit
Min
Max
1
SCL clock frequency
fSCL
0
400
kHz
2
Bus free time between a STOP and START condition
tBUF
1.3
μs
3
Hold time (repeated) START condition. After this period, the first clock
pulse is generated
tHD;STA
0.6
μs
4
LOW period of the SCL clock
tLOW
1.3
μs
5
HIGH period of the SCL clock
tHIGH
0.6
μs
6
Set-up time for a repeated START condition
tSU;STA
0.6
μs
7
Data hold time
tHD;DAT
0
μs
8
Data set-up time
tSU;DAT
100
ns
9
Set-up time for STOP condition
tSU;STO
0.6
μs
All values referred to VIH min. and VIL max. Levels (see Table 2).
Table 2
Input/Output Characteristics of the SDA and SCL terminal for I
2C-BUS devices
Item
Symbol
Fast-mode I
2C-BUS)
Unit
Min
Max
10
LOW level input voltage
VIL
-0.5
1
V
11
HIGH level input voltage
VIH
2.3
-
V
12
Pulse width of spikes which must be suppressed by the input filter.
tSP
0
50
ns
13
LOW level output voltage : At 3mA sink current
VOL1
0
0.4
V
14
Input current each I/O pin with an input voltage between 0.4V and 4.5
VDDmax.
Ii
-10
10
μA
Table 3 Input Characteristics of the CS terminal (Slave Address can be changed by the setting of CS terminal)
Item
Symbol
Min
Max
Unit
1
CS = Low:Slave Address 80 hex
VCSL
-0.5
1
V
2
CS = High:Slave Address 84 hex
VCSH
2.3
VCC
V
STOP condition START condition
Repetition
START condition
STOP condition
SDA
S
SCL
tLOW
tHD;DAT
P
tHD;STA
tHIGH
t BUF
tSU;DAT
tSU;STA
tSU;STO
tSP
tHD;STA
Sr
P
0.3V DD
=1V
0.7VDD
=2.3V
Figure 13.
A command timing example in
the I
2C-BUS data transmission


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