74AUC1G00GW datasheet(4/12 Pages) PHILIPS

部品番号	74AUC1G00GW

部品情報	Single 2-input NAND gate

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メーカー	PHILIPS [NXP Semiconductors]

ホームページ	http://www.nxp.com

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4 / 12 page

2002 Nov 12

4

Philips Semiconductors

Preliminary speciﬁcation

Single 2-input NAND gate

74AUC1G00

handbook, halfpage

MNA098

2

4

&

1

Fig.3 IEE/IEC logic symbol.

handbook, halfpage

MNA099

B

A

Y

Fig.4 Logic diagram.

RECOMMENDED OPERATING CONDITIONS

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. When VCC =0 (Powered-down mode), the output voltage can be 2.7 V in normal operation.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VCC

supply voltage

0.8

2.7

V

VI

input voltage

0

2.7

V

VO

output voltage

active mode

0

VCC

V

VCC = 0 V; Power-down mode

0

2.7

V

Tamb

operating ambient temperature

−40

+85

°C

tr,tf (∆t/∆f)

input rise and fall times

0

20

ns/V

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VCC

supply voltage

−0.5

+3.6

V

IIK

input diode current

VI <0

−−50

mA

VI

input voltage

note 1

−0.5

+3.6

V

IOK

output diode current

VO >VCC or VO <0

−±50

mA

VO

output voltage

active mode; notes 1 and 2

−0.5

VCC + 0.5

V

Power-down mode; notes 1 and 2

−0.5

+3.6

V

IO

output source or sink current

VO =0toVCC

−±60

mA

ICC, IGND

VCC or GND current

−±100

mA

Tstg

storage temperature

−65

+150

°C

PD

power dissipation per package

for temperature range from

−40 to +85 °C

−

250

mW

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