ADuM4121-1CRIZ-RL datasheet(4/16 Pages) AD

部品番号	ADuM4121-1CRIZ-RL

部品情報	2 A peak output current (<2 廓 RDSON)

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ADuM4121/ADuM4121-1

Data Sheet

Rev. 0| Page 4 of 16

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

Skew3

tPSK

22

ns

CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 5 Ω

Falling Edge4

tPSKHL

12

ns

CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 5 Ω

Rising Edge5

tPSKLH

15

ns

CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 5 Ω

Pulse Width Distortion

tPWD

7

13

ns

CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 5 Ω

Output Rise/Fall Time (10% to 90%)

tR/tF

11

18

26

ns

CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 5 Ω

Common-Mode Transient Immunity (CMTI)

|CM|

Static CMTI6

150

kV/µs

VCM = 1500 V

Dynamic CMTI7

150

kV/µs

VCM = 1500 V

1

RGON and RGOFF are the external gate resistors in the test.

2

tDLH propagation delay is measured from the time of the input rising logic high threshold, VIH, to the output rising 10% threshold of the VOUT signal. tDHL propagation

delay is measured from the input falling logic low threshold, VIL, to the output falling 90% threshold of the VOx signal. See Figure 24 for waveforms of the propagation delay

parameters.

3

tPSK is the magnitude of the worst case difference in tDLH and/or tDHL that is measured between units at the same operating temperature, supply voltages, and output

load within the recommended operating conditions. See Figure 24 for waveforms of the propagation delay parameters.

4

tPSKHL is the magnitude of the worst case difference in tDHL that is measured between units at the same operating temperature, supply voltages, and output load within

the recommended operating conditions. See Figure 24 for waveforms of the propagation delay parameters.

5

tPSKLH is the magnitude of the worst case difference in tDLH that is measured between units at the same operating temperature, supply voltages, and output load within

the recommended operating conditions. See Figure 24 for waveforms of the propagation delay parameters.

6

Static common-mode transient immunity (CMTI) is defined as the largest dv/dt between GND1 and GND2, with inputs held either high or low, such that the output

voltage remains either above 0.8 × VDD2 for output high or 0.8 V for output low. Operation with transients above recommended levels can cause momentary data upsets.

7

Dynamic common-mode transient immunity (CMTI) is defined as the largest dv/dt between GND1 and GND2 with the switching edge coincident with the transient test

pulse. Operation with transients above the recommended levels can cause momentary data upsets.

REGULATORY INFORMATION

The ADuM4121/ADuM4121-1 are pending approval by the organizations listed in Table 2.

Table 2.

UL (Pending)

CSA (Pending)

VDE (Pending)

CQC (Pending)

UL1577 Component

Recognition Program

Approved under CSA Component Acceptance

Notice 5A

DIN V VDE V 0884-10

(VDE V 0884-10):2006-12

Certified under CQC11-

471543-2012

Single Protection, 5000 V rms

Isolation Voltage

CSA 60950-1-07+A1+A2 and IEC 60950-1, second

edition, +A1+A2:

Reinforced insulation, 849 V

peak, VIOSM = 10 kV peak

GB4943.1-2011

Basic insulation at 800 V rms (1131 V peak)

Basic insulation 849 V peak,

VIOSM = 16 kV peak

Basic insulation at 800 V rms

(1131 V peak)

Reinforced insulation at 400 V rms (565 V peak)

Reinforced insulation at

400 V rms (565 V peak)

IEC 60601-1 Edition 3.1:

Basic insulation (1 MOPP), 500 V rms (707 V peak)

Reinforced insulation (2 MOPP), 250 V rms

(1414 V peak)

CSA 61010-1-12 and IEC 61010-1 third edition

Basic insulation at: 600 V rms mains, 800 V

secondary (1089 V peak)

Reinforced insulation at: 300 V rms mains, 400 V

secondary (565 V peak)

File E214100

File 205078

File 2471900-4880-0001

File (pending)

PACKAGE CHARACTERISTICS

Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

Resistance (Input Side to High-Side Output)1

RI-O

1012

Ω

Capacitance (Input Side to High-Side Output)1

CI-O

2.0

pF

Input Capacitance

CI

4.0

pF

Junction to Top Characterization Parameter

ΨJT

7.3

°C/W

4-layer PCB

1

The device is considered a two-terminal device: Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.

同様の部品番号 - ADuM4121-1CRIZ-RL

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