LMK61E0M-SIAR datasheet(4/47 Pages) TI1

部品番号	LMK61E0M-SIAR

部品情報	Ultra-Low Jitter Programmable Oscillator with Internal EEPROM

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LMK61E0M

SNAS692 – JANUARY 2017

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Product Folder Links: LMK61E0M

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(1)

JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±500

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VDD

Device Supply Voltage

3.135

3.3

3.465

V

TA

Ambient Temperature

–40

25

85

°C

TJ

Junction Temperature

120

°C

tRAMP

VDD Power-Up Ramp Time

0.1

100

ms

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

The package thermal resistance is calculated on a 4 layer JEDEC board.

(3)

Connected to GND with 3 thermal vias (0.3-mm diameter).

(4)

ψJB (junction to board) is used when the main heat flow is from the junction to the GND pad. Please refer to Thermal Considerations

section for more information on ensuring good system reliability and quality.

6.4 Thermal Information

THERMAL METRIC(1)

LMK61E0 (2) (3) (4)

UNIT

QFM (SIA)

8 PINS

Airflow (LFM) 0

Airflow (LFM) 200

Airflow (LFM) 400

RθJA

Junction-to-ambient thermal resistance

54

44

41.2

°C/W

RθJC(top) Junction-to-case (top) thermal resistance

34

n/a

RθJB

Junction-to-board thermal resistance

36.7

n/a

ψJT

Junction-to-top characterization parameter

11.2

16.9

21.9

ψJB

Junction-to-board characterization parameter

36.7

37.8

38.9

RθJC(bot) Junction-to-case (bottom) thermal resistance

n/a

(1)

Refer to Parameter Measurement Information for relevant test conditions.

6.5 Electrical Characteristics - Power Supply

(1)

VDD = 3.3 V ± 5%, TA = –40C to 85°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IDD

Device Current Consumption

LVCMOS

140

180

mA

IDD-PD

Device Current Consumption

when output is disabled

OE = GND

120

(1)

Refer to Parameter Measurement Information for relevant test conditions.

6.6 3.3-V LVCMOS Output Characteristics

(1)

VDD = 3.3 V ± 5%, TA = –40°C to 85°C, outputs loaded with 2 pF to GND

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fOUT

Output Frequency

Fast mode, R22[7:6] = 0x0

50

200

MHz

VOH

Output High Voltage

IOH = 1 mA

2.5

V

VOL

Output Low Voltage

IOL = 1 mA

0.6

V

IOH

Output High Current

-33

mA

IOL

Output Low Current

33

mA

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