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ADF4355BCPZ-RL7 データシート(PDF) 5 Page - Analog Devices

部品番号 ADF4355BCPZ-RL7
部品情報  Analog and digital lock detect
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADF4355BCPZ-RL7 データシート(HTML) 5 Page - Analog Devices

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ADF4355
Data Sheet
Rev. A | Page 4 of 35
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
RF OUTPUT CHARACTERISTICS
VCO Frequency Range
3400
6800
MHz
Fundamental VCO range
RF Output Frequency
53.125
6800
MHz
VCO Sensitivity
KV
15
MHz/V
Frequency Pushing (Open-Loop)
15
MHz/V
Frequency Pulling (Open-Loop)
0.5
MHz
Voltage standing wave ratio (VSWR) = 2:1
Harmonic Content
Second
−27
dBc
Fundamental VCO output (RFOUTA+)
−22
dBc
Divided VCO output (RFOUTA+)
Third
−20
dBc
Fundamental VCO output (RFOUTA+)
−12
dBc
Divided VCO output (RFOUTA+)
RF Output Power4
+8
dBm
RFOUTA+ = 1 GHz
+3
dBm
RFOUTA+/RFOUTA− = 4.4 GHz
RF Output Power Variation
±1
dB
RFOUTA+/RFOUTA− = 4.4 GHz
RF Output Power Variation (over
Frequency)
±3
dB
RFOUTA+/RFOUTA− = 1 GHz to 4.4 GHz
Level of Signal with RF Output
Disabled
−60
dBm
RFOUTA+/RFOUTA− = 1 GHz, VCO = 4 GHz
−30
dBm
RFOUTA+/RFOUTA− = 4.4 GHz, VCO = 4.4 GHz
NOISE CHARACTERISTICS
Fundamental VCO Phase Noise
Performance
VCO noise in open-loop conditions
−116
dBc/Hz
100 kHz offset from 3.4 GHz carrier
−136
dBc/Hz
800 kHz offset from 3.4 GHz carrier
−138
dBc/Hz
1 MHz offset from 3.4 GHz carrier
−155
dBc/Hz
10 MHz offset from 3.4 GHz carrier
−113
dBc/Hz
100 kHz offset from 5.0 GHz carrier
−133
dBc/Hz
800 kHz offset from 5.0 GHz carrier
−135
dBc/Hz
1 MHz offset from 5.0 GHz carrier
−153
dBc/Hz
10 MHz offset from 5.0 GHz carrier
−110
dBc/Hz
100 kHz offset from 6.8 GHz carrier
−130
dBc/Hz
800 kHz offset from 6.8 GHz carrier
−132
dBc/Hz
1 MHz offset from 6.8 GHz carrier
−150
dBc/Hz
10 MHz offset from 6.8 GHz carrier
Normalized In-Band Phase Noise Floor
Fractional Channel5
−221
dBc/Hz
Integer Channel6
−223
dBc/Hz
Normalized 1/f Noise, PN1_f7
−116
dBc/Hz
10 kHz offset; normalized to 1 GHz
Integrated RMS Jitter
150
fs
Spurious Signals due to Phase
Frequency Detector (PFD) Frequency
−80
dBc
1
VCP is the voltage at the CPOUT pin.
2
IOL is the output low current.
3
TA = 25°C; AVDD = DVDD = VRF = 3.3 V; VVCO = VP = 5.0 V; prescaler = 4/5; fREFIN = 122.88 MHz; fPFD = 61.44 MHz; and fRF = 1650 MHz.
4
RF output power using the EV-ADF4355SD1Z evaluation board measured into a spectrum analyzer, with board and cable losses de-embedded. The EV-ADF4355SD1Z
RF outputs are pulled up externally using a 4.7 nH inductor. Unused RF output pins are terminated in 50 Ω.
5
Use this figure to calculate the phase noise for any application. To calculate in-band phase noise performance as seen at the VCO output, use the following formula:
−221 + 10log(fPFD) + 20logN. The value given is the lowest noise mode for the fractional channel.
6
Use this figure to calculate the phase noise for any application. To calculate in-band phase noise performance as seen at the VCO output, use the following formula:
−223 + 10log(fPFD) + 20logN. The value given is the lowest noise mode for the integer channel.
7
The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (fRF)
and at a frequency offset (f) is given by PN = P1_f + 10log(10 kHz/f) + 20log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in the
ADIsimPLL design tool.


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