ADRF6820-EVALZ datasheet(8/45 Pages) AD

部品番号	ADRF6820-EVALZ

部品情報	Internal LO frequency range

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ADRF6820

Data Sheet

Rev. C | Page 8 of 45

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NOTES

1. THE EXPOSED PAD MUST BE CONNECTED TO A

GROUND PLANE WITH LOW THERMAL IMPEDANCE.

TOP VIEW

(Not to Scale)

ADRF6820

VPOS_3P3

GND

I+

I–

Q–

Q+

GND

DECL1

VPOS_3P3

RFIN0

GND

DECL2

GND

ENBL

GND

RFIN1

VPOS_5V

1

2

3

4

5

6

7

8

9

10

23

24

25

26

27

28

29

30

22

21

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 19, 30, 31, 36

VPOS_3P3

3.3 V Power Supply.

2, 3, 8, 9, 23, 25, 26, 28, 38

GND

Ground.

4, 5

I+, I−

Differential Baseband Outputs, I Channel.

6, 7

Q−, Q+

Differential Baseband Outputs, Q Channel.

10

DECL1

Decoupling for Mixer Load. Connect a 0.22 µF capacitor from DECL1 to GND.

11, 21

VPOS_5V

5 V Power Supply.

12

VOCM

Reference Voltage Input. This pin sets the output common-mode level.

13

SDIO

SPI Data.

14

SCLK

SPI Clock.

15

CS

Chip Select, Active Low.

16

MUXOUT

Multiplexer Output. Output pin providing the PLL reference signal or the PLL lock

detect.

17, 18

LOOUT+, LOOUT−

Differential LO Outputs.

20

RFSW

RF Switch Select. Selects between RFIN0 and RFIN1.

22, 29

RFIN1, RFIN0

RF Inputs. Single pole, double throw switch input.

24

ENBL

Enable, Active High.

27, 33

DECL2, DECL3

VCO LDO Decoupling.

32

VTUNE

VCO Tuning Voltage Input.

34, 35

LOIN−, LOIN+

Differential LO Inputs.

37

CP

PLL Charge Pump Output.

39

REFIN

PLL Reference Input.

40

DECL4

2.5 V LDO Decoupling.

EPAD

Exposed Pad. The exposed pad must be connected to a ground plane with low thermal

impedance.

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