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ADuM4136BRWZ-RL データシート(PDF) 6 Page - Analog Devices |
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ADuM4136BRWZ-RL データシート(HTML) 6 Page - Analog Devices |
6 / 17 page Data Sheet ADuM4136 Rev. 0 | Page 5 of 16 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage. Table 5. VDE Characteristics Description Test Conditions/Comments Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III For Rated Mains Voltage ≤ 400 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage VIORM 849 V peak Input to Output Test Voltage, Method B1 VIORM × 1.875 = Vpd(m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Vpd (m) 1592 V peak Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC Vpd (m) 1274 V peak After Input and/or Safety Test Subgroup 2 and Subgroup 3 VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC Vpd (m) 1019 V peak Highest Allowable Overvoltage VIOTM 8000 V peak Surge Isolation Voltage VPEAK = 12.8 kV, 1.2 μs rise time, 50 μs, 50% fall time VIOSM 8000 V peak Safety Limiting Values Maximum value allowed in the event of a failure (see Figure 2) Maximum Junction Temperature TS 150 °C Safety Total Dissipated Power PS 2.77 W Insulation Resistance at TS VIO = 500 V RS >109 Ω AMBIENT TEMPERATURE (°C) 050 3.0 2.5 2.0 1.5 1.0 0.5 0 100 150 200 Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN V VDE V 0884-10 RECOMMENDED OPERATING CONDITIONS Table 6. Parameter Value Operating Temperature Range (TA) −40°C to +125°C Supply Voltages VDD11 2.5 V to 6 V VDD22 12 V to 35 V VDD2 − VSS22 12 V to 35 V VSS22 −15 V to 0 V Input Signal Rise/Fall Time 1 ms Static Common Mode Transient Immunity3 −100 kV/μs to +100 kV/μs Dynamic Common Mode Transient Immunity4 −100 kV/μs to +100 kV/μs 1 Referenced to VSS1. 2 Referenced to GND2. 3 Static common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with inputs held either high or low such that the output voltage remains either above 0.8 × VDD2 for output high, or 0.8 V for output low. Operation with transients above recommended levels can cause momentary data upsets. 4 Dynamic common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with the switching edge coincident with the transient test pulse. Operation with transients above recommended levels can cause momentary data upsets. |
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