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LM25141QRGETQ1 データシート(PDF) 4 Page - Texas Instruments |
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LM25141QRGETQ1 データシート(HTML) 4 Page - Texas Instruments |
4 / 49 page 4 LM25141-Q1 SNVSAP9 – MARCH 2017 www.ti.com Product Folder Links: LM25141-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Functions (continued) PIN TYPE DESCRIPTION NO. NAME 15 VIN P Supply voltage input source for the VCC regulator 16 VCCX P Optional input for an external bias supply. If VCCX > 4.5 V, VCCX is internally connected to the VCC pin and the internal VCC regulator is disabled. If VCCX is unused, it must be grounded. 17 VOUT I Current sense amplifier input. Connect this pin to the output side of the current sense resistor. 18 CS I Current sense amplifier input. Make a low current Kelvin connection between this pin and the inductor side of the external current sense resistor. 19 FB I Connect the FB pin to VDDA for a fixed 3.3-V output or connect FB to AGND for a fixed 5-V output. Connecting the FB pin to the appropriate output divider network sets the output voltage between 1.5 V and 15 V. The regulation threshold at the FB pin is 1.2 V. 20 COMP I Output of the transconductance error amplifier. 21 PG O An open-collector output which switches low if VOUT is outside of the power good window. 22 SS I Soft-start programming pin. An external capacitor and an internal 20-μA current source set the ramp rate of the internal error amplifier reference during soft-start. Pulling SS pin below 80 mV turns off the gate driver outputs, but all the other functions remain active. 23 EN I An active high logic input enables the controller. 24 RES O Restart timer pin. An external capacitor configures the hiccup mode current limiting. The capacitor at the RES pin determines the time the controller will remain off before automatically restarting in hiccup mode. The hiccup mode commences when the controller experiences 512 consecutive PWM cycles with cycle-by-cycle current limiting. Connecting the RES pin to VDD during power up disables hiccup mode protection. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Input voltage VIN –0.3 47 V SW to PGND –0.3 47 V SW to PGND (20-ns transient) –5 V HB to SW –0.3 6.5 V HB to SW (20-ns transient) –5 V HO, HOL to SW –0.3 HB + 0.3 V HO, HOL to SW (20-ns transient) –5 V LO, LOL to PGND –0.3 VCC + 0.3 V LO, LOL to PGND (20-ns transient) –1.5 V OSC, SS, COMP, RES, DEMB, RT, DITH –0.3 VDD + 0.3 V EN to PGND –0.3 47 V VCC, VCCX, VDD, PG, FB –0.3 6.5 V VOUT, CS –0.3 15.5 V PGND to AGND –0.3 0.3 V Operating junction temperature(2) –40 150 °C Storage temperature, Tstg –65 150 °C |
同様の部品番号 - LM25141QRGETQ1 |
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同様の説明 - LM25141QRGETQ1 |
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