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CDCE937PWRG4 データシート(PDF) 11 Page - Texas Instruments

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部品番号 CDCE937PWRG4
部品情報  Flexible Low Power LVCMOS Clock Generator With SSC Support For EMI Reduction
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ホームページ  http://www.ti.com
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CDCE937PWRG4 データシート(HTML) 11 Page - Texas Instruments

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CDCE937, CDCEL937
www.ti.com
SLAS564G – AUGUST 2007 – REVISED OCTOBER 2016
Product Folder Links: CDCE937 CDCEL937
Submit Documentation Feedback
Copyright © 2007–2016, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The CDCE937 and CDCEL937 devices are modular PLL-based, low-cost, high-performance, programmable
clock synthesizers, multipliers, and dividers. They generate up to seven output clocks from a single input
frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using one of the
three integrated configurable PLLs. The CDCx937 has separate output supply pins, VDDOUT, which is 1.8 V for
CDCEL937 and 2.5 V to 3.3 V for CDCE937.
The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load
capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF.
Additionally, a selectable on-chip VCXO allows synchronization of the output frequency to an external control
signal, that is, the PWM signal.
The deep M/N divider ratio allows the generation of 0 ppm audio/video, networking (WLAN, BlueTooth, Ethernet,
GPS) or Interface (USB, IEEE1394, Memory Stick) clocks from a reference input frequency such as 27 MHz.
All PLLs supports SSC (Spread-Spectrum Clocking). SSC can be Center-Spread or Down-Spread clocking which
is a common technique to reduce electro-magnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically
adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.
The device supports non-volatile EEPROM programming for ease-customized application. It is preset to a factory
default configuration (see Default Device Setting). It can be reprogrammed to a different application configuration
before PCB assembly, or reprogrammed by in-system programming. All device settings are programmable
through SDA/SCL bus, a 2-wire serial interface.
Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operation including
frequency selection changing the SSC parameters to lower EMI, PLL bypass, power down, and choosing
between low level or 3-state for output-disable function.
The CDCx937 operates in a 1.8-V environment. It is characterized for operation from –40°C to 85°C.


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