データシートサーチシステム |
|
STD110N02RT4G データシート(PDF) 1 Page - ON Semiconductor |
|
STD110N02RT4G データシート(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2014 September, 2014 − Rev. 11 1 Publication Order Number: NTD110N02R/D NTD110N02R, STD110N02R Power MOSFET 24 V, 110 A, N−Channel DPAK Features • Planar HD3e Process for Fast Switching Performance • Low RDS(on) to Minimize Conduction Loss • Low Ciss to Minimize Driver Loss • Low Gate Charge • Optimized for High Side Switching Requirements in High−Efficiency DC−DC Converters • S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 24 V Gate−to−Source Voltage − Continuous VGS ±20 V Thermal Resistance − Junction−to−Case Total Power Dissipation @ TC = 25°C Drain Current − Continuous @ TC = 25°C, Chip − Continuous @ TC = 25°C Limited by Package − Continuous @ TA = 25°C Limited by Wires − Single Pulse (tp = 10 ms) RqJC PD ID ID ID ID 1.35 110 110 110 32 110 °C/W W A A A A Thermal Resistance − Junction−to−Ambient (Note 1) − Total Power Dissipation @ TA = 25°C − Drain Current − Continuous @ TA = 25°C RqJA PD ID 52 2.88 17.5 °C/W W A Thermal Resistance − Junction−to−Ambient (Note 2) − Total Power Dissipation @ TA = 25°C − Drain Current − Continuous @ TA = 25°C RqJA PD ID 100 1.5 12.5 °C/W W A Operating and Storage Temperature Range TJ, Tstg − 55 to 175 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 50 Vdc, VGS = 10 Vdc, IL = 15.5 Apk, L = 1.0 mH, RG = 25 W) EAS 120 mJ Maximum Lead Temperature for Soldering Purposes, (1/8 ″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 0.5 sq in drain pad size. 2. When surface mounted to an FR4 board using the minimum recommended pad size. http://onsemi.com 24 V 4.1 m W @ 10 V RDS(on) TYP 110 A ID MAX V(BR)DSS N−Channel D S G DPAK CASE 369AA (Surface Mount) STYLE 2 1 2 3 4 MARKING DIAGRAM & PIN ASSIGNMENT 1 Gate 3 Source 2 Drain 4 Drain A = Assembly Location* Y = Year WW = Work Week T110N2 = Device Code G = Pb−Free Package See detailed ordering and shipping information on page 5 of this data sheet. ORDERING INFORMATION * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. |
同様の部品番号 - STD110N02RT4G |
|
同様の説明 - STD110N02RT4G |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |