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AD9248BST-20 データシート(PDF) 4 Page - Analog Devices |
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AD9248BST-20 データシート(HTML) 4 Page - Analog Devices |
4 / 23 page AD9248 Preliminary Technical Data Rev. PrE | Page 4 of 23 CHARACTERISTICS Offset Error Full V ±0.1 ±0.1 ±0.1 % FSR Gain Error Full V ±0.05 ±0.05 ±0.05 % FSR 1 Gain error and gain temperature coefficient are based on the A/D converter only (with a fixed 1.0 V external reference). 2 Measured at maximum clock rate with a low frequency sine wave input and approximately 5 pF loading on each output bit. 3 Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure for the equivalent analog input structure. 4 Measured with dc input at maximum clock rate. 5 Standby power is measured with the CLK_A and CLK_B pins inactive (i.e., set to AVDD or AGND). Specifications subject to change without notice. |
同様の部品番号 - AD9248BST-20 |
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同様の説明 - AD9248BST-20 |
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