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932SQL456AGLFT データシート(PDF) 3 Page - Integrated Device Technology

部品番号 932SQL456AGLFT
部品情報  Low-Power CK420BQ Derivative for PCIe
Download  23 Pages
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

932SQL456AGLFT データシート(HTML) 3 Page - Integrated Device Technology

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REVISION B 09/29/15
3
LOW-POWER CK420BQ DERIVATIVE FOR PCIE SEPARATE CLOCK ARCHITECTURES
932SQL456 DATASHEET
64TSSOP Pin Descriptions (cont.)
PIN #
PIN NAME
TYPE
DESCRIPTION
41
NS_SRC0_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SRC output. Internally
terminated to drive 85ohm transmission lines with no external components.
42
NS_SRC0_Z85T
OUT
True clock of low-power push-pull differential non-spreading SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
43
NS_SRC1_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SRC output. Internally
terminated to drive 85ohm transmission lines with no external components.
44
NS_SRC1_Z85T
OUT
True clock of low-power push-pull differential non-spreading SRC output. Internally terminated to
drive 85ohm transmission lines with no external components.
45
VDDNS
PWR 3.3V power for the Non-Spreading differential outputs outputs and logic
46
GNDNS
PWR Ground pin for non-spreading differential outputs and logic.
47
NS_SAS0_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SAS output. Internally
terminated to drive 85ohm transmission lines with no external components.
48
NS_SAS0_Z85T
OUT
True clock of low-power push-pull differential non-spreading SAS output. Internally terminated to
drive 85ohm transmission lines with no external components.
49
NS_SAS1_Z85C
OUT
Complementary clock of low-power push-pull differential non-spreading SAS output. Internally
terminated to drive 85ohm transmission lines with no external components.
50
NS_SAS1_Z85T
OUT
True clock of low-power push-pull differential non-spreading SAS output. Internally terminated to
drive 85ohm transmission lines with no external components.
51
AVDD_NS_SAS
PWR 3.3V power for the non-spreading SAS/SRC PLL analog circuits.
52
GNDNS
PWR Ground pin for non-spreading differential outputs and logic.
53
CPU0_Z85C
OUT
Complementary clock of low-power push-pull differential CPU output. Internally terminated to
drive 85ohm transmission lines with no external components.
54
CPU0_Z85T
OUT
True clock of low-power push-pull differential CPU output. Internally terminated to drive 85ohm
transmission lines with no external components.
55
CPU1_Z85C
OUT
Complementary clock of low-power push-pull differential CPU output. Internally terminated to
drive 85ohm transmission lines with no external components.
56
CPU1_Z85T
OUT
True clock of low-power push-pull differential CPU output. Internally terminated to drive 85ohm
transmission lines with no external components.
57
VDDCPU
PWR 3.3V power for the CPU outputs and logic
58
GNDCPU
PWR Ground pin for CPU outputs and logic.
59
CPU2_Z85C
OUT
Complementary clock of low-power push-pull differential CPU output. Internally terminated to
drive 85ohm transmission lines with no external components.
60
CPU2_Z85T
OUT
True clock of low-power push-pull differential CPU output. Internally terminated to drive 85ohm
transmission lines with no external components.
61
CPU3_Z85C
OUT
Complementary clock of low-power push-pull differential CPU output. Internally terminated to
drive 85ohm transmission lines with no external components.
62
CPU3_Z85T
OUT
True clock of low-power push-pull differential CPU output. Internally terminated to drive 85ohm
transmission lines with no external components.
63
VDDCPU
PWR 3.3V power for the CPU outputs and logic
64
SMBDAT
I/O
Data pin of SMBUS circuitry, 5V tolerant


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