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LMR23625CFDDA データシート(PDF) 11 Page - Texas Instruments |
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LMR23625CFDDA データシート(HTML) 11 Page - Texas Instruments |
11 / 40 page EA REF EN/SYNC SW BOOT VCC Internal SS OV/UV Detector Oscillator Precision Enable LDO PFM Detector Slope Comp PWM CONTROL LOGIC UVLO TSD Freq Foldback Zero Cross HICCUP Detector VIN Rc Cc PGND FB LS I Sense HS I Sense FB VCC Enable SYNC Detector SYNC Signal SYNC Signal AGND 11 LMR23625 www.ti.com SNVSAH3B – DECEMBER 2015 – REVISED APRIL 2017 Product Folder Links: LMR23625 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Fixed Frequency Peak Current Mode Control The following operating description of the LMR23625 will refer to the Functional Block Diagram and to the waveforms in Figure 13. LMR23625 is a step-down synchronous buck regulator with integrated high-side (HS) and low-side (LS) switches (synchronous rectifier). The LMR23625 supplies a regulated output voltage by turning on the HS and LS NMOS switches with controlled duty cycle. During high-side switch ON time, the SW pin voltage swings up to approximately VIN, and the inductor current iL increase with linear slope (VIN – VOUT) / L. When the HS switch is turned off by the control logic, the LS switch is turned on after an anti-shoot-through dead time. Inductor current discharges through the LS switch with a slope of –VOUT / L. The control parameter of a buck converter is defined as Duty Cycle D = tON / TSW, where tON is the high-side switch ON time and TSW is the switching period. The regulator control loop maintains a constant output voltage by adjusting the duty cycle D. In an ideal buck converter, where losses are ignored, D is proportional to the output voltage and inversely proportional to the input voltage: D = VOUT / VIN. |
同様の部品番号 - LMR23625CFDDA |
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同様の説明 - LMR23625CFDDA |
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