TC90A49P/F

2001-03-06 6/17

1.

AD converter (ADC)

2.

Clamp circuit

Performs sync tip clamp of the input video signal. The clamp level is determined internally to use the ADC

dynamic range efficiently.

3.

Line memory

Incorporates DRAM-resident, four 1-H delay circuits. Combination of delay circuits and delay times are

TV Format

NTSC

PAL

N-PAL

M-PAL

Delay Amount (clock)

910

1135

917

909

4.

Band pass filter (BPF)

Extracts the chrominance signal from the line-memory-delayed composite video signal. The same filter is used

by NTSC, PAL, M-PAL, and N-PAL formats. The center frequency is fsc. The characteristics differ depending

on the TV format. BPFs are provided for both input and output sides of the dynamic comb filter. The input side

control.

5.

Dynamic comb filter (DCF)

Using Toshiba's original decision logic, detects a correlation of the three consecutive vertical lines for NTSC,

every other three lines for PAL, and extracts the chrominance signal accordingly.

6.

Vertical edge enhancement circuit

Generates edge components in proportion to the luminance differential signal of the three consecutive vertical

lines and adds the components to the luminance signal output. There are eight enhancement levels selected by

edge enhancement is reduced. Signals lower than the pedestal level due to the addition of the edge

enhancement signal may be generated ; however, such signals are eliminated by the pedestal clip circuit at a

later stage. Therefore, there is no adverse effect on the sync processor circuit. The coring circuit regards small

edge components as noise and does not perform enhancement.