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AD9975ABST データシート(PDF) 6 Page - Analog Devices

部品番号 AD9975ABST
部品情報  Broadband Modem Mixed-Signal Front End
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9975ABST データシート(HTML) 6 Page - Analog Devices

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AD9975
DEFINITIONS OF SPECIFICATIONS
Clock Jitter
The clock jitter is a measure of the intrinsic jitter of the PLL
generated clocks. It is a measure of the jitter from one rising
edge of the clock with respect to another edge of the clock nine
cycles later.
Differential Nonlinearity Error (DNL, No Missing Codes)
An ideal converter exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Guaranteed no
missing codes to 10-bit resolution indicate that all 1024 codes,
respectively, must be present over all operating ranges.
Integral Nonlinearity Error (INL)
Linearity error refers to the deviation of each individual code from
a line drawn from “negative full scale” through “positive full
scale.” The point used as negative full scale occurs 1/2 LSB
before the first code transition. Positive full scale is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular code to the true
straight line.
Phase Noise
Single-sideband phase noise power density is specified relative
to the carrier (dBc/Hz) at a given frequency offset (1 kHz) from
the carrier. Phase noise can be measured directly on a generated
single tone with a spectrum analyzer that supports noise marker
measurements. It detects the relative power between the carrier
and the offset (1 kHz) sideband noise and takes the resolution
bandwidth (rbw) into account by subtracting 10 log(rbw). It also
adds a correction factor that compensates for the implementation
of the resolution bandwidth, log display, and detector characteristic.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation, resulting in nonlinear per-
formance, or breakdown.
Spurious-Free Dynamic Range (SFDR)
The difference, in dB, between the rms amplitude of the DAC’s
output signal (or ADC’s input signal) and the peak spurious
signal over the specified bandwidth (Nyquist bandwidth, unless
otherwise noted).
Pipeline Delay (Latency)
The number of clock cycles between conversion initiation and
the associated output data being made available.
Offset Error
First transition should occur for an analog value 1/2 LSB above
negative full scale. Offset error is defined as the deviation of the
actual transition from that point.
Gain Error
The first code transition should occur at an analog value 1/2 LSB
above negative full scale. The last transition should occur for an
analog value 1 1/2 LSB below the nominal full scale. Gain error
is the deviation of the actual difference between first and last
code transitions and the ideal difference between first and last
code transitions.
Input Referred Noise
The rms output noise is measured using histogram techniques.
The ADC output code’s standard deviation is calculated in LSB
and converted to an equivalent voltage. This results in a
noise figure that can directly be referred to the RX input of
the AD9975.
Signal-to-Noise and Distortion Ratio (SINAD)
SINAD is the ratio of the rms value of the measured input signal
to the rms sum of all other spectral components below the Nyquist
frequency, including harmonics but excluding dc. The value for
SINAD is expressed in decibels.
Effective Number of Bits (ENOB)
For a sine wave, SINAD can be expressed in terms of the number
of bits. Using the following formula,
N
SINAD
dB
= (– . )
/ .
176
602
it is possible to get a measure of performance expressed as N,
the effective number of bits.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the measured input signal to
the rms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured input signal and is
expressed as a percentage or in decibels.
Power Supply Rejection
Power supply rejection specifies the converter’s maximum
full-scale change when the supplies are varied from nominal to
minimum and maximum specified voltages.


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