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CA054X104K2GALTU データシート(PDF) 5 Page - Kemet Corporation

部品番号 CA054X104K2GALTU
部品情報  Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
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メーカー  KEMET [Kemet Corporation]
ホームページ  http://www.kemet.com
Logo KEMET - Kemet Corporation

CA054X104K2GALTU データシート(HTML) 5 Page - Kemet Corporation

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© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1016_C0G_ARRAY_SMD • 10/14/2016
55
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade)
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
−55°C to +125°C
Capacitance Change with Reference to
+25°C and 0 VDC Applied (TCC)
±30 ppm/ºC
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
0%
1
Dielectric Withstanding Voltage (DWV)
250% of rated voltage
(5±1 seconds and charge/discharge not exceeding 50 mA)
2
Dissipation Factor (DF) Maximum Limit at 25ºC
0.1%
3
Insulation Resistance (IR) Limit at 25°C
1,000 megohm microfarads or 100 GΩ
(Rated voltage applied for 120±5 seconds at 25°C)
1
DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the
capacitor.
2
Capacitance and dissipation factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF
3
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions:
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known
as Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
C0G
All
All
0.5
0.3% or ±0.25 pF
10% of Initial
Limit


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